[llvm-testresults] buildbot failure in smooshlab on clang-x86_64-darwin10

daniel_dunbar at apple.com daniel_dunbar at apple.com
Thu Jul 8 18:10:35 PDT 2010


The Buildbot has detected a new failure of clang-x86_64-darwin10 on smooshlab.
Full details are available at:
 http://smooshlab.apple.com:8010/builders/clang-x86_64-darwin10/builds/8463

Buildbot URL: http://smooshlab.apple.com:8010/

Buildslave for this Build: smoosh-04

Build Reason: 
Build Source Stamp: 107946
Blamelist: bruno,bwilson,djg,lattner

BUILD FAILED: failed compile

sincerely,
 -The Buildbot


================================================================================

CHANGES:
Files:
 lib/CodeGen/SelectionDAG/DAGCombiner.cpp
 test/CodeGen/ARM/2010-06-29-PartialRedefFastAlloc.ll
 test/CodeGen/ARM/reg_sequence.ll
At: Thu 08 Jul 2010 17:43:38
Changed By: bwilson
Comments: Reenable DAG combining for vector shuffles.  It looks like it was temporarily
disabled and then never turned back on again.  Adjust some tests, one because
this change avoids an unnecessary instruction, and the other to make it
continue testing what it was intended to test.
Properties: 




File: lib/Target/X86/X86MCCodeEmitter.cpp
At: Thu 08 Jul 2010 17:43:38
Changed By: bruno
Comments: Factor out x86 segment override prefix encoding, and also use it for VEXProperties: 




Files:
 include/llvm/CodeGen/CallingConvLower.h
 include/llvm/CodeGen/FastISel.h
 include/llvm/CodeGen/FunctionLoweringInfo.h
 include/llvm/CodeGen/SelectionDAGISel.h
 include/llvm/Support/PassNameParser.h
 include/llvm/Target/TargetLowering.h
 lib/CodeGen/CallingConvLower.cpp
 lib/CodeGen/LLVMTargetMachine.cpp
 lib/CodeGen/SelectionDAG/FastISel.cpp
 lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
 lib/CodeGen/SelectionDAG/InstrEmitter.cpp
 lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
 lib/CodeGen/SelectionDAG/TargetLowering.cpp
 lib/Target/X86/X86FastISel.cpp
 lib/Target/X86/X86ISelLowering.cpp
 lib/Target/X86/X86ISelLowering.h
 lib/Target/XCore/XCoreISelLowering.cpp
 lib/Target/XCore/XCoreISelLowering.h
 test/CodeGen/X86/fast-isel-loads.ll
 test/CodeGen/X86/fast-isel.ll
At: Thu 08 Jul 2010 17:43:38
Changed By: djg
Comments: Re-apply bottom-up fast-isel, with fixes. Be very careful to avoid emitting
a DBG_VALUE after a terminator, or emitting any instructions before an EH_LABEL.
Properties: 




Files:
 lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
 test/CodeGen/ARM/reg_sequence.ll
 test/CodeGen/Thumb2/machine-licm.ll
At: Thu 08 Jul 2010 17:48:38
Changed By: bwilson
Comments: Print "dregpair" NEON operands with a space between them, for readability and
consistency with other instructions that have lists of register operands.
Properties: 




Files:
 SingleSource/Regression/C/casts.c
 SingleSource/Regression/C/casts.reference_output
At: Thu 08 Jul 2010 17:53:59
Changed By: bwilson
Comments: Change SingleSource/Regression/C/casts to explicitly use int64_t values
instead of longs.  Otherwise the output differs between 32-bit and 64-bit
targets.
Properties: 




Files:
 lib/Target/X86/AsmPrinter/X86MCInstLower.cpp
 lib/Target/X86/X86AsmBackend.cpp
 lib/Target/X86/X86InstrInfo.td
At: Thu 08 Jul 2010 17:53:59
Changed By: lattner
Comments: have the mc lowering process handle a few tail call forms, lowering them to
jumps where possible and turning the TAILCALL marker in the instruction
asm string into a proper comment.

This eliminates a FIXME and is on the path to finishing:
rdar://7639610 - eliminate encoding and asm info for TAILJMPd TAILJMPr TAILJMPn, etc.

However, I can't eliminate the encodings for these instructions because the JIT
still exists and has its own copy of the encoder, sigh.
Properties: 




LOGS:
Last 10 lines of 'stdio':
	llvm[2]: Compiling StrongPHIElimination.cpp for Debug+Asserts build
	llvm[2]: Compiling TailDuplication.cpp for Debug+Asserts build
	llvm[2]: Compiling TargetInstrInfoImpl.cpp for Debug+Asserts build
	llvm[2]: Compiling TargetLoweringObjectFileImpl.cpp for Debug+Asserts build
	llvm[2]: Compiling TwoAddressInstructionPass.cpp for Debug+Asserts build
	llvm[2]: Compiling UnreachableBlockElim.cpp for Debug+Asserts build
	llvm[2]: Compiling VirtRegMap.cpp for Debug+Asserts build
	llvm[2]: Compiling VirtRegRewriter.cpp for Debug+Asserts build
	llvm[2]: Building Debug+Asserts Archive Library libLLVMCodeGen.a
	make: *** [all] Error 1




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