[llvm-testresults] buildbot failure in smooshlab on clang-x86_64-darwin10-selfhost-rel

daniel_dunbar at apple.com daniel_dunbar at apple.com
Sat Feb 27 16:56:00 PST 2010


The Buildbot has detected a new failure of clang-x86_64-darwin10-selfhost-rel on smooshlab.
Full details are available at:
 http://smooshlab.apple.com:8010/builders/clang-x86_64-darwin10-selfhost-rel/builds/59

Buildbot URL: http://smooshlab.apple.com:8010/

Buildslave for this Build: smoosh-02

Build Reason: 
Build Source Stamp: 97356
Blamelist: andersca,djg,lattner

BUILD FAILED: failed compile

sincerely,
 -The Buildbot


================================================================================

CHANGES:
File: test/CodeGen/X86/vec_insert.ll
At: Sat 27 Feb 2010 15:59:08
Changed By: djg
Comments: Add nounwinds.
Properties: 




File: lib/CodeGen/CGVtable.cpp
At: Sat 27 Feb 2010 15:59:08
Changed By: andersca
Comments: Fix to dumpLayout; we want to be able to dump address points even if the vtable doesn't have any methods.Properties: 




File: gcc/llvm-backend.cpp
At: Sat 27 Feb 2010 16:08:58
Changed By: djg
Comments: Wire up -ffinite-math-only.
Properties: 




File: lib/CodeGen/MachineLICM.cpp
At: Sat 27 Feb 2010 16:14:03
Changed By: djg
Comments: Don't unconditionally suppress hoisting of instructions with implicit
defs or uses. The regular def and use checking below covers them, and
can be more precise. It's safe to hoist an instruction with a dead
implicit def if the register isn't live into the loop header.
Properties: 




File: lib/CodeGen/CGVtable.cpp
At: Sat 27 Feb 2010 16:14:03
Changed By: andersca
Comments: Add new function.Properties: 




Files:
 lib/Target/X86/X86InstrInfo.cpp
 lib/Target/X86/X86InstrSSE.td
 lib/Target/X86/X86RegisterInfo.cpp
 lib/Target/X86/X86RegisterInfo.h
 lib/Target/X86/X86RegisterInfo.td
At: Sat 27 Feb 2010 16:19:01
Changed By: djg
Comments: Implement XMM subregs.

Extracting the low element of a vector is now done with EXTRACT_SUBREG,
and the zero-extension performed by load movss is now modeled with
SUBREG_TO_REG, and so on.

Register-to-register movss and movsd are no longer considered copies;
they are two-address instructions which insert a scalar into a vector.
Properties: 




Files:
 utils/TableGen/CodeGenDAGPatterns.cpp
 utils/TableGen/CodeGenDAGPatterns.h
 utils/TableGen/DAGISelMatcher.cpp
At: Sat 27 Feb 2010 16:24:02
Changed By: lattner
Comments: Generalize my hack to use SDNodeInfo to find out when a
node is always guaranteed to have a particular type 
instead of hacking in ISD::STORE explicitly.  This allows
us to use implied types for a broad range of nodes, even
target specific ones.
Properties: 




Files:
 lib/CodeGen/CGVTT.cpp
 lib/CodeGen/CGVtable.cpp
 lib/CodeGen/CGVtable.h
At: Sat 27 Feb 2010 16:39:05
Changed By: andersca
Comments: Pass information about whether a base is virtual or not down to getCtorVtable, we need this information in the vtable builder.Properties: 




LOGS:
Last 10 lines of 'stdio':
	llvm[2]: ======= Finished Linking Release Executable llvm-mc (without symbols)
	make[1]: *** [bugpoint/.makeall] Error 2
	llvm[4]: Building Release Archive Library libplugin_llvmc_Base.a
	llvm[4]: Building LLVMC configuration library with tblgen
	llvm[4]: Compiling PluginMain.cpp for Release build
	llvm[4]: Building Release Archive Library libplugin_llvmc_Clang.a
	llvm[3]: Compiling Main.cpp for Release build
	llvm[3]: Linking Release executable llvmc (without symbols)
	llvm[3]: ======= Finished Linking Release Executable llvmc (without symbols)
	make: *** [all] Error 1




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