[llvm-testresults] buildbot failure in smooshlab on llvm-gcc-x86_64-darwin10-selfhost

[daniel_dunbar at apple.com]

The Buildbot has detected a new failure of llvm-gcc-x86_64-darwin10-selfhost on smooshlab.
Full details are available at:
 http://smooshlab.apple.com:8010/builders/llvm-gcc-x86_64-darwin10-selfhost/builds/7088

Buildbot URL: http://smooshlab.apple.com:8010/

Buildslave for this Build: smoosh-04

Build Reason: 
Build Source Stamp: 121812
Blamelist: grosbach,stoklund,void

BUILD FAILED: failed test-llvm

sincerely,
 -The Buildbot


================================================================================

CHANGES:
Files:
 include/llvm/Target/TargetRegisterInfo.h
 utils/TableGen/RegisterInfoEmitter.cpp
At: Tue 14 Dec 2010 15:06:40
Changed By: stoklund
Comments: Introduce TargetRegisterInfo::getOverlaps(Reg), returning a list of all
registers that alias Reg, including itself. This is almost the same as the
existing getAliasSet() method, except for the inclusion of Reg.

The name matches the reflexive TRI::regsOverlap(x, y) relation.

It is very common to do stuff to a register and all its aliases:

  stuff(Reg)
  for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias)
    stuff(*Alias);

That can now be written as the simpler:

  for (const unsigned *Alias = TRI->getOverlaps(Reg); *Alias; ++Alias)
    stuff(*Alias);

This change requires a bit more constant space for the alias lists because Reg
is included and because the empty alias list cannot be shared any longer.

If the getAliasSet method is eventually removed, this space can be reclaimed by
sharing overlap lists. For instance, %rax and %eax have identical overlap sets.Properties: 




File: lib/CodeGen/RegAllocBasic.cpp
At: Tue 14 Dec 2010 15:16:40
Changed By: stoklund
Comments: Simplyfy RegAllocBasic by using getOverlaps instead of getAliasSet.Properties: 




File: lib/CodeGen/AggressiveAntiDepBreaker.cpp
At: Tue 14 Dec 2010 15:27:58
Changed By: stoklund
Comments: Simplify AggressiveAntiDepBreaker's use of register aliases.Properties: 




File: lib/CodeGen/CallingConvLower.cpp
At: Tue 14 Dec 2010 15:31:40
Changed By: stoklund
Comments: Simplify CCState's use of register aliases.Properties: 




File: lib/CodeGen/RegAllocGreedy.cpp
At: Tue 14 Dec 2010 15:41:57
Changed By: stoklund
Comments: Simplify RegAllocGreedy's use of register aliases.Properties: 




File: lib/Target/ARM/ARMISelDAGToDAG.cpp
At: Tue 14 Dec 2010 15:46:40
Changed By: void
Comments: Make the ISel selections for LDR/STR the same as before the LDRr/LDRi split. In
particular, we want

   ldr r2, [r3]

to be equivalent to

   ldr r2, [r3, #0]

and not

   ldr r2, [r3, r0]

Properties: 




File: lib/Target/ARM/ARMInstrThumb.td
At: Tue 14 Dec 2010 15:46:40
Changed By: void
Comments: Comments and cleaning.Properties: 




File: lib/Target/ARM/ARMMCCodeEmitter.cpp
At: Tue 14 Dec 2010 15:51:50
Changed By: grosbach
Comments: thumb adr fixup needs alignment just like the t2 version.Properties: 




LOGS:
Last 10 lines of 'stdio':
	Failing Tests (2):
	    LLVM :: CodeGen/Thumb/asmprinter-bug.ll
	    LLVM :: CodeGen/Thumb/ldr_ext.ll
	
	  Expected Passes    : 5620
	  Expected Failures  : 51
	  Unsupported Tests  : 40
	  Unexpected Failures: 2
	make[1]: *** [check-local-lit] Error 1
	make: *** [check] Error 2

Last 10 lines of 'dg.log':
	

Last 10 lines of 'dg.sum':