[llvm-testresults] buildbot failure in smooshlab on clang-x86_64-darwin10-fnt

[daniel_dunbar at apple.com]

The Buildbot has detected a new failure of clang-x86_64-darwin10-fnt on smooshlab.
Full details are available at:
 http://smooshlab.apple.com:8010/builders/clang-x86_64-darwin10-fnt/builds/1328

Buildbot URL: http://smooshlab.apple.com:8010/

Buildslave for this Build: smoosh-02

Build Reason: 
Build Source Stamp: 101334
Blamelist: djg,echristo,evancheng,johnny,kremenek

BUILD FAILED: failed compile

sincerely,
 -The Buildbot


================================================================================

CHANGES:
File: include/clang/AST/ASTVector.h
At: Wed 14 Apr 2010 18:18:08
Changed By: kremenek
Comments: Teach ASTVector::append() about the case where 'NumInputs' is 0.  This hopefully fixes
a crash in InitListExpr's ctor.Properties: 




Files:
 lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
 lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
At: Wed 14 Apr 2010 18:23:08
Changed By: johnny
Comments: Wrap the error msgs in DEBUG() macro so that they won't appear in NDEBUG build.
Properties: 




Files:
 lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
 lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
 lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
 lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
 lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
At: Wed 14 Apr 2010 18:28:08
Changed By: evancheng
Comments: More 80 violations.Properties: 




Files:
 lib/Target/X86/X86ISelLowering.cpp
 lib/Target/X86/X86InstrSSE.td
At: Wed 14 Apr 2010 18:43:08
Changed By: echristo
Comments: Allow lowering for palignr instructions for mmx sized vectors.  Add
patterns to handle the lowering.
Properties: 




Files:
 include/clang/Basic/BuiltinsX86.def
 lib/CodeGen/CGBuiltin.cpp
 lib/Headers/tmmintrin.h
 test/CodeGen/palignr.c
At: Wed 14 Apr 2010 18:48:08
Changed By: echristo
Comments: Rewrite handling of 64-bit palignr intrinsics to be vector shuffles.
Stop multiplying constant by 8 accordingly in the header and change
intrinsic definition for what types we expect.

Add to existing palignr test to check that we're emitting the correct things.
Properties: 




File: gcc/config/i386/llvm-i386.cpp
At: Wed 14 Apr 2010 18:48:08
Changed By: echristo
Comments: Rewrite palignr and palignr128 handling to use vector shuffle if possible
instead of intrinsic.
Properties: 




Files:
 include/llvm/CodeGen/FastISel.h
 include/llvm/CodeGen/GCMetadata.h
 include/llvm/CodeGen/MachineConstantPool.h
 include/llvm/CodeGen/MachineInstrBuilder.h
 include/llvm/CodeGen/MachineModuleInfo.h
 include/llvm/CodeGen/MachineOperand.h
 include/llvm/CodeGen/SelectionDAG.h
 include/llvm/CodeGen/SelectionDAGISel.h
 include/llvm/CodeGen/SelectionDAGNodes.h
 include/llvm/Target/TargetLowering.h
 lib/CodeGen/AsmPrinter/DwarfException.cpp
 lib/CodeGen/IntrinsicLowering.cpp
 lib/CodeGen/MachineFunction.cpp
 lib/CodeGen/MachineModuleInfo.cpp
 lib/CodeGen/SelectionDAG/DAGCombiner.cpp
 lib/CodeGen/SelectionDAG/FastISel.cpp
 lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
 lib/CodeGen/SelectionDAG/InstrEmitter.cpp
 lib/CodeGen/SelectionDAG/SDNodeDbgValue.h
 lib/CodeGen/SelectionDAG/SelectionDAG.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
 lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
 lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
 lib/CodeGen/SelectionDAG/TargetLowering.cpp
 lib/ExecutionEngine/JIT/JITDwarfEmitter.cpp
 lib/ExecutionEngine/JIT/JITEmitter.cpp
 lib/Target/ARM/ARMBaseRegisterInfo.cpp
 lib/Target/ARM/ARMCodeEmitter.cpp
 lib/Target/ARM/ARMConstantPoolValue.cpp
 lib/Target/ARM/ARMConstantPoolValue.h
 lib/Target/ARM/ARMExpandPseudoInsts.cpp
 lib/Target/ARM/ARMISelLowering.cpp
 lib/Target/ARM/ARMSubtarget.cpp
 lib/Target/ARM/ARMSubtarget.h
 lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
 lib/Target/ARM/Thumb1RegisterInfo.cpp
 lib/Target/ARM/Thumb2RegisterInfo.cpp
 lib/Target/Alpha/AlphaCodeEmitter.cpp
 lib/Target/Alpha/AlphaISelLowering.cpp
 lib/Target/Blackfin/BlackfinISelLowering.cpp
 lib/Target/CellSPU/AsmPrinter/SPUAsmPrinter.cpp
 lib/Target/CellSPU/SPUISelDAGToDAG.cpp
 lib/Target/CellSPU/SPUISelLowering.cpp
 lib/Target/MBlaze/MBlazeISelLowering.cpp
 lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
 lib/Target/Mips/MipsISelLowering.cpp
 lib/Target/PIC16/PIC16ISelLowering.cpp
 lib/Target/PIC16/PIC16Passes/PIC16Cloner.cpp
 lib/Target/PIC16/PIC16TargetObjectFile.cpp
 lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
 lib/Target/PowerPC/PPCCodeEmitter.cpp
 lib/Target/PowerPC/PPCISelLowering.cpp
 lib/Target/Sparc/SparcISelLowering.cpp
 lib/Target/SystemZ/SystemZISelLowering.cpp
 lib/Target/SystemZ/SystemZInstrBuilder.h
 lib/Target/X86/X86CodeEmitter.cpp
 lib/Target/X86/X86FastISel.cpp
 lib/Target/X86/X86ISelDAGToDAG.cpp
 lib/Target/X86/X86ISelLowering.cpp
 lib/Target/X86/X86ISelLowering.h
 lib/Target/X86/X86InstrBuilder.h
 lib/Target/X86/X86InstrInfo.cpp
 lib/Target/XCore/XCoreISelLowering.cpp
 lib/Target/XCore/XCoreISelLowering.h
At: Wed 14 Apr 2010 18:53:08
Changed By: djg
Comments: Add const qualifiers to CodeGen's use of LLVM IR constructs.
Properties: 




LOGS:
Last 10 lines of 'stdio':
	llvm[4]: Compiling X86TargetInfo.cpp for Debug build
	llvm[4]: Building Debug Archive Library libLLVMX86Info.a
	make[1]: *** [Target/.makeall] Error 2
	make[1]: *** Waiting for unfinished jobs....
	llvm[3]: Compiling CallGraph.cpp for Debug build
	llvm[3]: Compiling CallGraphSCCPass.cpp for Debug build
	llvm[3]: Compiling FindUsedTypes.cpp for Debug build
	llvm[3]: Compiling GlobalsModRef.cpp for Debug build
	llvm[3]: Building Debug Archive Library libLLVMipa.a
	make: *** [all] Error 1