[llvm-testresults] FreeBSD 6.0 x86 nightly test (gcc 4.1.0)

[Vladimir Merzliakov]

http://npt.cc.rsu.ru/testresults-X86-FreeBSD/index.html
using LLVM-GCC builded from CVS sources at:
Fri Mar 10 12:29:41 UTC 2006
-------------------------------------------------------
DEJAGNU TEST RESULTS:
  FAIL: /usr/home/wanderer/pkg/build/llvm/night/build/llvm/test/Regression/CFrontend/2003-08-18-SigSetJmp.c: 
  FAIL: /usr/home/wanderer/pkg/build/llvm/night/build/llvm/test/Regression/CodeGen/Generic/vector.ll: 

DEJAGNU STATISTICS:
  # of expected passes		1299
  # of unexpected failures	2
  # of expected failures		37
ADDED   WARNINGS:
lib/Transforms/Scalar/LoopStrengthReduce.cpp:: warning: comparison between signed and unsigned integer expressions
lib/AsmParser//usr/home/wanderer/pkg/build/llvm/night/build/llvm/lib/AsmParser/llvmAsmParser.y: warning: 4 shift/reduce conflicts and 5 reduce/reduce conflicts
runtime/libprofile/gccld: warning: Cannot find library 'crtend'
runtime/GC/SemiSpace/gccld: warning: Cannot find library 'crtend'
projects/Stacker/lib/runtime/gccld: warning: Cannot find library 'crtend'


USERS WHO COMMITTED:
  evancheng
  jeffc
  jlaskey
  lattner
  sampo

ADDED FILES:
  llvm-test/SingleSource/UnitTests/Vector/Altivec/casts.c
  llvm/test/Regression/CodeGen/Generic/2006-03-27-DebugInfoNULLDeclare.ll
  llvm/test/Regression/CodeGen/Generic/vector-constantexpr.ll
  llvm/test/Regression/CodeGen/X86/unpcklps.ll

CHANGED FILES:
  llvm/include/llvm/CodeGen/DwarfWriter.h
  llvm/include/llvm/CodeGen/SelectionDAGNodes.h
  llvm/include/llvm/CodeGen/ValueTypes.h
  llvm/include/llvm/IntrinsicsPowerPC.td
  llvm/include/llvm/Target/MRegisterInfo.h
  llvm/lib/CodeGen/DwarfWriter.cpp
  llvm/lib/CodeGen/MachineDebugInfo.cpp
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
  llvm/lib/Target/Alpha/AlphaRegisterInfo.h
  llvm/lib/Target/IA64/IA64RegisterInfo.cpp
  llvm/lib/Target/IA64/IA64RegisterInfo.h
  llvm/lib/Target/MRegisterInfo.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/lib/Target/PowerPC/PPCInstrAltivec.td
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
  llvm/lib/Target/PowerPC/PPCRegisterInfo.h
  llvm/lib/Target/PowerPC/README_ALTIVEC.txt
  llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
  llvm/lib/Target/Sparc/SparcRegisterInfo.h
  llvm/lib/Target/SparcV9/SparcV9RegisterInfo.cpp
  llvm/lib/Target/SparcV9/SparcV9RegisterInfo.h
  llvm/lib/Target/TargetSelectionDAG.td
  llvm/lib/Target/X86/README.txt
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.h
  llvm/lib/Target/X86/X86InstrSSE.td
  llvm/lib/Target/X86/X86RegisterInfo.cpp
  llvm/lib/Target/X86/X86RegisterInfo.h
  llvm/test/Regression/CodeGen/X86/vec_shuffle.ll
  llvm/utils/TableGen/DAGISelEmitter.cpp
  llvm/utils/TableGen/IntrinsicEmitter.cpp
  llvm/win32/VMCore/VMCore.vcproj