[llvm-testresults] nightly ia64 test run

[The nightly build donkey]

DEJAGNU TEST RESULTS:
  FAIL: /home/builddonkey/builddir/llvm/test/Regression/CFrontend/2004-02-13-IllegalVararg.c.tr: 
  FAIL: /home/builddonkey/builddir/llvm/test/Regression/CFrontend/2004-06-17-UnorderedCompares.c.tr: 
  FAIL: /home/builddonkey/builddir/llvm/test/Regression/CFrontend/2005-09-20-ComplexConstants.c: 
  FAIL: /home/builddonkey/builddir/llvm/test/Regression/CFrontend/2005-12-04-AttributeUsed.c: 
  FAIL: /home/builddonkey/builddir/llvm/test/Regression/CFrontend/2005-12-04-DeclarationLineNumbers.c: 
  FAIL: /home/builddonkey/builddir/llvm/test/Regression/CFrontend/2006-01-16-BitCountIntrinsicsUnsigned.c: 
  FAIL: /home/builddonkey/builddir/llvm/test/Regression/CodeGen/Alpha/2006-01-26-VaargBreak.ll: 
  FAIL: /home/builddonkey/builddir/llvm/test/Regression/CodeGen/Generic/2005-01-18-SetUO-InfLoop.ll: 
  FAIL: /home/builddonkey/builddir/llvm/test/Regression/CodeGen/PowerPC/2006-01-11-darwin-fp-argument.ll: 
  FAIL: /home/builddonkey/builddir/llvm/test/Regression/CodeGen/PowerPC/2006-01-18-InvalidBranchOpcodeAssert.ll: 
  FAIL: /home/builddonkey/builddir/llvm/test/Regression/CodeGen/PowerPC/darwin-labels.ll: 
  FAIL: /home/builddonkey/builddir/llvm/test/Regression/ExecutionEngine/2002-12-16-ArgTest.ll: 
  FAIL: /home/builddonkey/builddir/llvm/test/Regression/ExecutionEngine/2003-10-18-PHINode-ConstantExpr-CondCode-Failure.ll: 
  FAIL: /home/builddonkey/builddir/llvm/test/Regression/ExecutionEngine/hello.ll: 
  FAIL: /home/builddonkey/builddir/llvm/test/Regression/ExecutionEngine/hello2.ll: 
  FAIL: /home/builddonkey/builddir/llvm/test/Regression/ExecutionEngine/parallel.ll: 
  FAIL: /home/builddonkey/builddir/llvm/test/Regression/ExecutionEngine/test-constantexpr.ll: 
  FAIL: /home/builddonkey/builddir/llvm/test/Regression/ExecutionEngine/test-phi.ll: 

DEJAGNU STATISTICS:
  # of expected passes		1216
  # of unexpected failures	18
  # of expected failures		38
ADDED   WARNINGS:
lib/AsmParser//usr/share/bison.simple:: warning: comparison between signed and unsigned integer expressions
lib/AsmParser//usr/share/bison.simple:: warning: comparison between signed and unsigned integer expressions

REMOVED WARNINGS:
lib/Transforms/Instrumentation//usr/share/bison.simple:: warning: comparison between signed and unsigned integer expressions
lib/Transforms/Instrumentation//usr/share/bison.simple:: warning: comparison between signed and unsigned integer expressions


TESTS FIXED:  

llc-beta /MultiSource/Benchmarks/Olden/power/power
llc-beta /SingleSource/Benchmarks/Misc/whetstone
llc-beta /MultiSource/Benchmarks/Olden/em3d/em3d
llc-beta /MultiSource/Benchmarks/FreeBench/pifft/pifft
llc /MultiSource/Benchmarks/McCat/05-eks/eks
llc-beta /MultiSource/Benchmarks/McCat/05-eks/eks
llc /MultiSource/Benchmarks/Olden/bh/bh
llc-beta /MultiSource/Benchmarks/sim/sim
llc-beta /MultiSource/Benchmarks/SciMark2-C/scimark2
llc /MultiSource/Benchmarks/FreeBench/distray/distray
llc-beta /MultiSource/Benchmarks/FreeBench/distray/distray
llc /MultiSource/Benchmarks/FreeBench/neural/neural
llc-beta /MultiSource/Benchmarks/McCat/17-bintr/bintr
llc /MultiSource/Benchmarks/Ptrdist/ft/ft
llc-beta /MultiSource/Benchmarks/Olden/voronoi/voronoi
llc /MultiSource/Benchmarks/Olden/power/power
llc-beta /MultiSource/Benchmarks/FreeBench/neural/neural
llc /MultiSource/Benchmarks/SciMark2-C/scimark2
llc-beta /MultiSource/Benchmarks/Ptrdist/ft/ft
llc /MultiSource/Benchmarks/FreeBench/pifft/pifft
llc /MultiSource/Benchmarks/Olden/voronoi/voronoi
llc /MultiSource/Benchmarks/llubenchmark/llu
llc-beta /MultiSource/Benchmarks/llubenchmark/llu
llc /MultiSource/Benchmarks/McCat/17-bintr/bintr


Warning: empty y range [0:0], adjusting to [-1:1]
Warning: empty y range [0:0], adjusting to [-1:1]

USERS WHO COMMITTED:
  alenhar2
  duraid
  evancheng
  jeffc
  jlaskey
  lattner
  reid
  sampo

ADDED FILES:
  llvm/include/llvm/Support/Dwarf.h
  llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp
  llvm/lib/Target/SparcV8/SparcV8Subtarget.h
  llvm/test/Regression/CodeGen/Alpha/2005-12-12-MissingFCMov.ll
  llvm/test/Regression/CodeGen/Alpha/2006-01-26-VaargBreak.ll

CHANGED FILES:
  llvm-poolalloc/lib/PoolAllocate/AccessTrace.cpp
  llvm-poolalloc/lib/PoolAllocate/PointerCompress.cpp
  llvm-poolalloc/lib/PoolAllocate/PoolAllocate.cpp
  llvm-poolalloc/lib/PoolAllocate/PoolOptimize.cpp
  llvm-poolalloc/lib/PoolAllocate/TransformFunctionBody.cpp
  llvm-test/External/SPEC/CINT2000/252.eon/Makefile
  llvm/docs/BytecodeFormat.html
  llvm/docs/LangRef.html
  llvm/include/llvm/CodeGen/ScheduleDAG.h
  llvm/include/llvm/CodeGen/SelectionDAG.h
  llvm/include/llvm/CodeGen/SelectionDAGNodes.h
  llvm/include/llvm/InlineAsm.h
  llvm/include/llvm/Module.h
  llvm/include/llvm/Target/TargetLowering.h
  llvm/include/llvm/Value.h
  llvm/lib/AsmParser/Lexer.cpp
  llvm/lib/AsmParser/Lexer.l
  llvm/lib/AsmParser/ParserInternals.h
  llvm/lib/AsmParser/llvmAsmParser.cpp
  llvm/lib/AsmParser/llvmAsmParser.h
  llvm/lib/AsmParser/llvmAsmParser.y
  llvm/lib/Bytecode/Reader/Reader.cpp
  llvm/lib/Bytecode/Reader/Reader.h
  llvm/lib/Bytecode/Writer/SlotCalculator.cpp
  llvm/lib/Bytecode/Writer/SlotCalculator.h
  llvm/lib/Bytecode/Writer/Writer.cpp
  llvm/lib/Bytecode/Writer/WriterInternals.h
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  llvm/lib/Target/Alpha/AlphaISelLowering.cpp
  llvm/lib/Target/Alpha/AlphaISelLowering.h
  llvm/lib/Target/Alpha/AlphaInstrFormats.td
  llvm/lib/Target/Alpha/AlphaInstrInfo.td
  llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
  llvm/lib/Target/IA64/IA64Bundling.cpp
  llvm/lib/Target/IA64/IA64ISelLowering.cpp
  llvm/lib/Target/IA64/IA64ISelLowering.h
  llvm/lib/Target/IA64/IA64InstrInfo.td
  llvm/lib/Target/IA64/IA64RegisterInfo.cpp
  llvm/lib/Target/IA64/IA64RegisterInfo.td
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/lib/Target/SparcV8/Makefile
  llvm/lib/Target/SparcV8/SparcV8.td
  llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
  llvm/lib/Target/SparcV8/SparcV8Subtarget.cpp
  llvm/lib/Target/SparcV8/SparcV8Subtarget.h
  llvm/lib/Target/SparcV8/SparcV8TargetMachine.cpp
  llvm/lib/Target/SparcV8/SparcV8TargetMachine.h
  llvm/lib/Target/TargetLowering.cpp
  llvm/lib/Target/X86/Makefile
  llvm/lib/Target/X86/X86.h
  llvm/lib/Target/X86/X86.td
  llvm/lib/Target/X86/X86ATTAsmPrinter.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.h
  llvm/lib/Target/X86/X86InstrInfo.td
  llvm/lib/Target/X86/X86RegisterInfo.td
  llvm/lib/Target/X86/X86Subtarget.cpp
  llvm/lib/Target/X86/X86Subtarget.h
  llvm/lib/Target/X86/X86TargetMachine.cpp
  llvm/lib/Transforms/Utils/ValueMapper.cpp
  llvm/lib/VMCore/AsmWriter.cpp
  llvm/lib/VMCore/InlineAsm.cpp
  llvm/lib/VMCore/Module.cpp
  llvm/lib/VMCore/Verifier.cpp
  llvm/test/Feature/inlineasm.ll
  llvm/utils/TableGen/DAGISelEmitter.cpp
  llvm/win32/x86/x86.vcproj