[llvm-testresults] PowerPC nightly test

[Oscar T. Plant]

http://persephone.cs.uiuc.edu/~oscar/nightlytest/

DEJAGNU TEST RESULTS:
  FAIL: /Users/oscar/buildtest/llvm/test/Regression/CFrontend/2004-06-17-UnorderedCompares.c.tr: 
  FAIL: /Users/oscar/buildtest/llvm/test/Regression/CFrontend/2006-01-16-BitCountIntrinsicsUnsigned.c: 

DEJAGNU STATISTICS:
  # of expected passes		1232
  # of unexpected failures	2
  # of expected failures		36

TESTS FIXED:  

llc-beta /SingleSource/Regression/C++/EH/simple_rethrow
llc /SingleSource/Regression/C++/EH/throw_rethrow_test
llc /SingleSource/Regression/C++/EH/dead_try_block
cbe /SingleSource/Regression/C++/EH/simple_throw
llc-beta /SingleSource/Regression/C++/EH/simple_throw
jit /SingleSource/Regression/C++/EH/simple_rethrow
llc /SingleSource/Regression/C++/EH/simple_rethrow
jit /SingleSource/Regression/C++/EH/throw_rethrow_test
llc /SingleSource/Regression/C++/EH/simple_throw
cbe /SingleSource/Regression/C++/EH/dead_try_block
llc-beta /SingleSource/Regression/C++/EH/throw_rethrow_test
llc /SingleSource/Regression/C++/EH/ctor_dtor_count-2
cbe /SingleSource/Regression/C++/EH/simple_rethrow
cbe /SingleSource/Regression/C++/EH/throw_rethrow_test
llc-beta /SingleSource/Regression/C++/EH/ctor_dtor_count-2
jit /SingleSource/Regression/C++/EH/simple_throw
llc-beta /SingleSource/Regression/C++/EH/dead_try_block
cbe /SingleSource/Regression/C++/EH/ctor_dtor_count-2
jit /SingleSource/Regression/C++/EH/dead_try_block
jit /SingleSource/Regression/C++/EH/ctor_dtor_count-2



TESTS BROKEN: 

cbe /External/SPEC/CINT2000/252.eon/252.eon
llc /SingleSource/Regression/C++/EH/function_try_block
llc-beta /External/SPEC/CINT2000/252.eon/252.eon
llc /External/SPEC/CINT2000/252.eon/252.eon
cbe /SingleSource/Regression/C++/EH/function_try_block
jit /SingleSource/Regression/C++/EH/function_try_block
llc-beta /SingleSource/Regression/C++/EH/function_try_block



USERS WHO COMMITTED:
  alenhar2
  evancheng
  jeffc
  lattner
  reid
  sampo

CHANGED FILES:
  llvm-poolalloc/lib/PoolAllocate/AccessTrace.cpp
  llvm-poolalloc/lib/PoolAllocate/PointerCompress.cpp
  llvm-poolalloc/lib/PoolAllocate/PoolAllocate.cpp
  llvm-poolalloc/lib/PoolAllocate/PoolOptimize.cpp
  llvm-poolalloc/lib/PoolAllocate/TransformFunctionBody.cpp
  llvm-test/External/SPEC/CINT2000/252.eon/Makefile
  llvm/docs/BytecodeFormat.html
  llvm/docs/LangRef.html
  llvm/include/llvm/CodeGen/ScheduleDAG.h
  llvm/include/llvm/CodeGen/SelectionDAG.h
  llvm/include/llvm/CodeGen/SelectionDAGNodes.h
  llvm/include/llvm/InlineAsm.h
  llvm/include/llvm/Module.h
  llvm/include/llvm/Target/TargetLowering.h
  llvm/include/llvm/Value.h
  llvm/lib/AsmParser/Lexer.cpp
  llvm/lib/AsmParser/Lexer.l
  llvm/lib/AsmParser/ParserInternals.h
  llvm/lib/AsmParser/llvmAsmParser.cpp
  llvm/lib/AsmParser/llvmAsmParser.h
  llvm/lib/AsmParser/llvmAsmParser.y
  llvm/lib/Bytecode/Reader/Reader.cpp
  llvm/lib/Bytecode/Reader/Reader.h
  llvm/lib/Bytecode/Writer/SlotCalculator.cpp
  llvm/lib/Bytecode/Writer/SlotCalculator.h
  llvm/lib/Bytecode/Writer/Writer.cpp
  llvm/lib/Bytecode/Writer/WriterInternals.h
  llvm/lib/CodeGen/DwarfWriter.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  llvm/lib/Target/Alpha/AlphaISelLowering.cpp
  llvm/lib/Target/Alpha/AlphaISelLowering.h
  llvm/lib/Target/Alpha/AlphaInstrFormats.td
  llvm/lib/Target/Alpha/AlphaInstrInfo.td
  llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
  llvm/lib/Target/IA64/IA64ISelLowering.cpp
  llvm/lib/Target/IA64/IA64ISelLowering.h
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCISelLowering.h
  llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
  llvm/lib/Target/TargetLowering.cpp
  llvm/lib/Target/X86/X86ATTAsmPrinter.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.h
  llvm/lib/Target/X86/X86ISelPattern.cpp
  llvm/lib/Target/X86/X86InstrInfo.td
  llvm/lib/Target/X86/X86RegisterInfo.td
  llvm/lib/Transforms/Utils/ValueMapper.cpp
  llvm/lib/VMCore/AsmWriter.cpp
  llvm/lib/VMCore/InlineAsm.cpp
  llvm/lib/VMCore/Module.cpp
  llvm/lib/VMCore/Verifier.cpp
  llvm/test/Feature/inlineasm.ll
  llvm/utils/TableGen/DAGISelEmitter.cpp