[llvm-testresults] Cron <andrewl at fenris> sh /home/andrewl/llvm-alpha.sh
Cron Daemon
root at fenris.cs.uiuc.edu
Thu Jan 26 09:17:03 PST 2006
DEJAGNU TEST RESULTS:
XPASS: /localhome/andrewl/test-alpha/llvm/test/Regression/Bytecode/old-intrinsics.ll
DEJAGNU STATISTICS:
# of expected passes 1233
# of unexpected successes 1
# of expected failures 36
cvs history: CVS password file /home/andrewl/.cvspass does not exist - creating a new file
TESTS BROKEN:
llc /SingleSource/UnitTests/2003-05-07-VarArgs
llc-beta /SingleSource/UnitTests/2003-07-09-SignedArgs
llc /MultiSource/Applications/siod/siod
llc-beta /SingleSource/UnitTests/2003-05-07-VarArgs
llc /SingleSource/UnitTests/2003-07-09-SignedArgs
llc /External/SPEC/CINT2000/253.perlbmk/253.perlbmk
llc /SingleSource/UnitTests/2003-08-11-VaListArg
llc-beta /SingleSource/Regression/C/PR640
llc-beta /SingleSource/UnitTests/2003-08-11-VaListArg
llc /SingleSource/Regression/C/PR640
USERS WHO COMMITTED:
alenhar2
evancheng
jeffc
lattner
reid
sampo
CHANGED FILES:
llvm-poolalloc/lib/PoolAllocate/AccessTrace.cpp
llvm-poolalloc/lib/PoolAllocate/PointerCompress.cpp
llvm-poolalloc/lib/PoolAllocate/PoolAllocate.cpp
llvm-poolalloc/lib/PoolAllocate/PoolOptimize.cpp
llvm-poolalloc/lib/PoolAllocate/TransformFunctionBody.cpp
llvm-test/External/SPEC/CINT2000/252.eon/Makefile
llvm/docs/BytecodeFormat.html
llvm/docs/LangRef.html
llvm/include/llvm/CodeGen/ScheduleDAG.h
llvm/include/llvm/CodeGen/SelectionDAG.h
llvm/include/llvm/CodeGen/SelectionDAGNodes.h
llvm/include/llvm/InlineAsm.h
llvm/include/llvm/Module.h
llvm/include/llvm/Target/TargetLowering.h
llvm/include/llvm/Value.h
llvm/lib/AsmParser/Lexer.cpp
llvm/lib/AsmParser/Lexer.l
llvm/lib/AsmParser/ParserInternals.h
llvm/lib/AsmParser/llvmAsmParser.cpp
llvm/lib/AsmParser/llvmAsmParser.h
llvm/lib/AsmParser/llvmAsmParser.y
llvm/lib/Bytecode/Reader/Reader.cpp
llvm/lib/Bytecode/Reader/Reader.h
llvm/lib/Bytecode/Writer/SlotCalculator.cpp
llvm/lib/Bytecode/Writer/SlotCalculator.h
llvm/lib/Bytecode/Writer/Writer.cpp
llvm/lib/Bytecode/Writer/WriterInternals.h
llvm/lib/CodeGen/DwarfWriter.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
llvm/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
llvm/lib/Target/Alpha/AlphaISelLowering.cpp
llvm/lib/Target/Alpha/AlphaISelLowering.h
llvm/lib/Target/Alpha/AlphaInstrFormats.td
llvm/lib/Target/Alpha/AlphaInstrInfo.td
llvm/lib/Target/Alpha/AlphaRegisterInfo.cpp
llvm/lib/Target/IA64/IA64ISelLowering.cpp
llvm/lib/Target/IA64/IA64ISelLowering.h
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.h
llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
llvm/lib/Target/TargetLowering.cpp
llvm/lib/Target/X86/X86ATTAsmPrinter.cpp
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.h
llvm/lib/Target/X86/X86ISelPattern.cpp
llvm/lib/Target/X86/X86InstrInfo.td
llvm/lib/Target/X86/X86RegisterInfo.td
llvm/lib/Transforms/Utils/ValueMapper.cpp
llvm/lib/VMCore/AsmWriter.cpp
llvm/lib/VMCore/InlineAsm.cpp
llvm/lib/VMCore/Module.cpp
llvm/lib/VMCore/Verifier.cpp
llvm/test/Feature/inlineasm.ll
llvm/utils/TableGen/DAGISelEmitter.cpp
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