[llvm-testresults] FreeBSD 6.0 BETA4 x86 nightly test (gcc 4.0.2)

[Vladimir Merzliakov]

http://npt.cc.rsu.ru/testresults-X86-FreeBSD/index.html
using LLVM-GCC builded from CVS sources at:
Wed Sep 28 20:52:52 UTC 2005
-------------------------------------------------------
DEJAGNU TEST RESULTS:
  PERFECT!

DEJAGNU STATISTICS:
  # of expected passes		1947
  # of expected failures		57
ADDED   WARNINGS:
lib/Target/IA64/IA64GenDAGISel.inc:: warning: comparison between signed and unsigned integer expressions
lib/Target/IA64/IA64GenDAGISel.inc:: warning: comparison between signed and unsigned integer expressions


TESTS FIXED:  

cbe /MultiSource/Benchmarks/ASCI_Purple/SMG2000/smg2000
llc /MultiSource/Benchmarks/ASCI_Purple/SMG2000/smg2000
jit /MultiSource/Benchmarks/ASCI_Purple/SMG2000/smg2000
llc-beta /MultiSource/Benchmarks/ASCI_Purple/SMG2000/smg2000



USERS WHO COMMITTED:
  duraid
  jeffc
  jlaskey
  lattner
  sampo

ADDED FILES:
  llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
  llvm/lib/Target/IA64/IA64ISelLowering.cpp
  llvm/lib/Target/IA64/IA64ISelLowering.h
  llvm/test/Regression/CodeGen/Generic/isunord.ll

CHANGED FILES:
  llvm-test/Makefile.programs
  llvm/lib/Target/IA64/IA64.h
  llvm/lib/Target/IA64/IA64AsmPrinter.cpp
  llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
  llvm/lib/Target/IA64/IA64ISelPattern.cpp
  llvm/lib/Target/IA64/IA64InstrFormats.td
  llvm/lib/Target/IA64/IA64InstrInfo.td
  llvm/lib/Target/IA64/IA64RegisterInfo.cpp
  llvm/lib/Target/IA64/IA64RegisterInfo.td
  llvm/lib/Target/IA64/IA64TargetMachine.cpp
  llvm/lib/Target/IA64/Makefile
  llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
  llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  llvm/lib/Target/PowerPC/PPCInstrInfo.td
  llvm/lib/Target/PowerPC/README.txt
  llvm/lib/Transforms/Scalar/InstructionCombining.cpp
  llvm/test/Regression/CodeGen/Generic/isunord.ll
  llvm/utils/NightlyTest.gnuplot
  llvm/utils/NightlyTest.pl
  llvm/utils/NightlyTestTemplate.html
  llvm/utils/TableGen/CodeGenTarget.cpp
  llvm/utils/TableGen/DAGISelEmitter.cpp
  llvm/utils/TableGen/InstrInfoEmitter.cpp
  llvm/utils/TableGen/InstrInfoEmitter.h
  llvm/utils/TableGen/Record.cpp
  llvm/utils/TableGen/Record.h
  llvm/utils/TableGen/RegisterInfoEmitter.cpp
  llvm/utils/TableGen/SubtargetEmitter.cpp
  llvm/utils/TableGen/SubtargetEmitter.h
  llvm/win32/Analysis/Analysis.vcproj
  llvm/win32/Target/Target.vcproj