[llvm-testresults] Cron <andrewl at fenris> sh /home/andrewl/llvm-alpha.sh

Cron Daemon root at fenris.cs.uiuc.edu
Thu Dec 22 06:25:24 PST 2005


DEJAGNU TEST RESULTS:
  FAIL: /localhome/andrewl/test-alpha/llvm/test/Regression/CFrontend/2005-12-04-AttributeUsed.c: 
  FAIL: /localhome/andrewl/test-alpha/llvm/test/Regression/CFrontend/2005-12-04-DeclarationLineNumbers.c: 
  FAIL: /localhome/andrewl/test-alpha/llvm/test/Regression/ExecutionEngine/2003-01-04-ArgumentBug.ll: 

DEJAGNU STATISTICS:
  # of expected passes		1211
  # of unexpected failures	3
  # of expected failures		33
cvs history: CVS password file /home/andrewl/.cvspass does not exist - creating a new file

USERS WHO COMMITTED:
  duraid
  evancheng
  jeffc
  jlaskey
  lattner
  reid

ADDED FILES:
  llvm/include/llvm/CodeGen/DwarfWriter.h
  llvm/include/llvm/System/Alarm.h
  llvm/lib/CodeGen/DwarfWriter.cpp
  llvm/lib/System/Alarm.cpp
  llvm/lib/System/Unix/Alarm.inc
  llvm/lib/System/Win32/Alarm.inc
  llvm/test/Regression/Assembler/2005-12-21-ZeroInitVector.ll
  llvm/test/Regression/CodeGen/Generic/DebugStuff.ll

CHANGED FILES:
  llvm-test/Makefile.programs
  llvm-test/autoconf/configure.ac
  llvm-test/configure
  llvm/Makefile.rules
  llvm/Xcode/LLVM.xcodeproj/project.pbxproj
  llvm/autoconf/m4/sanity_check.m4
  llvm/docs/CommandGuide/llvm-ld.pod
  llvm/include/llvm/CodeGen/DwarfWriter.h
  llvm/include/llvm/System/Alarm.h
  llvm/include/llvm/Target/TargetLowering.h
  llvm/lib/AsmParser/ParserInternals.h
  llvm/lib/AsmParser/llvmAsmParser.cpp
  llvm/lib/AsmParser/llvmAsmParser.y
  llvm/lib/CodeGen/DwarfWriter.cpp
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  llvm/lib/Support/SlowOperationInformer.cpp
  llvm/lib/Target/Alpha/AlphaISelLowering.cpp
  llvm/lib/Target/IA64/IA64.td
  llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
  llvm/lib/Target/IA64/IA64ISelLowering.cpp
  llvm/lib/Target/IA64/IA64ISelPattern.cpp
  llvm/lib/Target/IA64/IA64InstrInfo.td
  llvm/lib/Target/IA64/IA64RegisterInfo.td
  llvm/lib/Target/PowerPC/PPCRegisterInfo.td
  llvm/lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
  llvm/lib/Target/TargetLowering.cpp
  llvm/lib/Target/TargetSelectionDAG.td
  llvm/lib/Target/X86/X86FloatingPoint.cpp
  llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86ISelLowering.h
  llvm/lib/Target/X86/X86ISelPattern.cpp
  llvm/lib/Target/X86/X86InstrInfo.td
  llvm/lib/Target/X86/X86RegisterInfo.cpp
  llvm/lib/Target/X86/X86RegisterInfo.td
  llvm/lib/VMCore/Instructions.cpp
  llvm/lib/VMCore/Verifier.cpp
  llvm/tools/gccld/GenerateCode.cpp
  llvm/tools/gccld/gccld.cpp
  llvm/tools/gccld/gccld.h
  llvm/tools/llvm-ld/llvm-ld.cpp
  llvm/utils/TableGen/DAGISelEmitter.cpp
  llvm/utils/TableGen/DAGISelEmitter.h
  llvm/win32/CodeGen/CodeGen.vcproj




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