<div class="gmail_quote">Hello<br><br>I think I found a bug in the x86
instruction definition file, while trying out the disassembler.<br><br>It
looks like the "ADD32rr_alt" instruction should have GR32 operands, not
GR16.<br><br>Attached you can find a patch, which should fix the
<br><br>But even with the change I can not decode e.g. "0x03 0xC1"
(should be "addl %ecx, %eax") only if I remove the "isCodeGenOnly =
1" line it works.<br>Looking for help.<br><br>-- Marius Wachtler<br></div>