[llvm-dev] Placement of static allocas

[Min-Yih Hsu via llvm-dev]

IIRC you can interleave debug intrinsics (e.g. llvm.dbg.declare) with
alloca instructions (at least the verifier doesn't complain). Not sure if
there are other intrinsics that fall into this category as well.

-Min

On Tue, Sep 21, 2021 at 7:45 AM Mahesha S via llvm-dev <
llvm-dev at lists.llvm.org> wrote:

> Hi-
>
> Here is my understanding and assumption about the placement of static
> allocas:
>
> "All static allocas should appear in the entry basic block before any
> function call for better optimization opportunities. If there are
> interleaved static allocas with function call in-between, such an ir is
> considered broken, even though the ir is valid from correctness
> perspective. And if any pass is not adhering to the requirement that all
> static allocas should be placed in the entry block before any function
> call, then such a pass is considered broken since it may lead to surprising
> results in general."
>
> Let me know if my above understanding is correct or not.
>
> Thanks,
> Mahesha
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
>


-- 
Min-Yih Hsu
Ph.D Student in ICS Department, University of California, Irvine (UCI).
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20210921/599240c1/attachment.html>