[llvm-dev] Question about LLVM backend and TableGen

[Sheng Yan Chen via llvm-dev]

Hi all,

I'm hacking LLVM TableGen file and I'm stuck with that. My problem is: I
know what the records mean, but I don't know what it will become.

Here's a simple example from RISCVInstrInfo.td

def BEQ   :  BranchCC_rri<0b000, "beq">

I know it is a branch-if-equal instruction in RISCV, I know "0b000" is its
encoding, I know "beq" is its assembly name. But I don't know what it will
becomes after TableGen processing it.

Will it be used at Instruction pattern matching ? Will it be used at
disassembler ? Will it be used at assembler ?

How can I know what this record will become after TableGen processing it ?

Thinking from another way, when I writing a new backend, how can I know
what kinds of TableGen record I need to supply ?

Is hacking TableGen backend a good way to get through this ?

Thanks for reading this dumb question :)

Sheng.
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