[llvm-dev] Re-using a node in a DAG output pattern in TableGen

[Cyril Six via llvm-dev]

Hello, 

I currently have an instruction selection pattern that looks like this : 




def : Pat<myinputop type:$v0 type:$v1, 
(COMPNHQ 
(ADDHQrr 
(SLLHQSri $v0, 8), 
(SLLHQSri $v1, 8), 
), 
(SLLHQSri $v0, 8), 
comparison_ltu 
)>; 



This output pattern is supposed to be a DAG: the node (SLLHQSri $v0, 8) is used two times. 

Experimentally, TableGen seems to recognize it as such (the node `(SLLHQSri $v0, 8)` will not be duplicated). 

I am wondering if there is a way to avoid having to repeat (SLLHQSri $v0, 8) in the syntax of TableGen, something like: 

BQ_BEGIN

def : Pat<inputpattern type:$v0 type:$v1, 
(COMPNHQ 
(ADDHQrr 
(SLLHQSri $v0, 8):$myvar, 
(SLLHQSri $v1, 8), 
), 
$myvar, 
comparison_ltu 
)>; 

BQ_END

If I try this, I get the error "Node 'myvar' in output pattern but not input pattern". 

Does anyone know if there is a way to name nodes from an output pattern to produce a non-tree output DAG? 

Do you know of any existing pattern featuring output DAG that are not trees? 

Thanks 

Cyril Six 
Compiler Engineer • Kalray 
Phone: 
csix at kalrayinc.com • [ https://www.kalrayinc.com/ | www.kalrayinc.com ] 

[ https://www.kalrayinc.com/ |   ] 
	
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