[llvm-dev] Modelling registers per subtarget

[jeniffer lesley via llvm-dev]

Hi
For my toy architecture, I have two subtarget, target 1 and target 2.
Target 1 has 1024 and Target2 has 2048 GPRs. How do I model them in .td
files? Should I just create a RegisterClass for them? If so, how do I
associate them with SubtargetFeature or ProcessorModel?

If this is not the right way then can someone please educate?


Thanks
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