[llvm-dev] Reg: Adding immediate operand as part of Intrinsic

[Craig Topper via llvm-dev]

There's not a good way to enforce the number of bits in the immediate in
IR. The best you can do is use an oversized type and have isel reject
selecting an instruction if the immediate doesn't fit. If you're creating
the intrinsic in clang from a builtin you can also range check the
immediate in lib/Sema/SemaChecking.cpp to give a nice diagnostic to the
user.

You might want to use llvm_i32_ty so that's at least a legal type on RV32.
Or llvm_anyint_ty and pick the correct type for RV32 or RV64 when you
create the intrinsic.

~Craig


On Wed, May 5, 2021 at 2:43 AM Sai Venkata Krishnan V via llvm-dev <
llvm-dev at lists.llvm.org> wrote:

> Hello Everyone
>    I am trying to add an custom Intrinsic to the RISCV backend, which
> operates on a *simm12 *operand. I figured the steps to add it to *lib/llvm/Target/RISCV/RISCVInstrInfo.td
> *& *lib/llvm/Target/RISCV/RISCVInstrFormats.td. *But I am not sure how to
> declare the intrinsic in *llvm/include/IR/IntrinsicsRISCV.td *.
> Specifically, since I require a *imm12 *operand, how should I specify
> that in intrinsic declaration? Is there a corresponding *llvm_i12_ty *which
> I can specify and make use of *ImmArg<> *to specify that the operand is
> an immediate, or should I just use the nearest size type, i.e. *llvm_i16_ty
> *and make use of the *ImmArg<>* ?
>
> Please guide me on this
>
> Thanking you
> Sai
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