[llvm-dev] Handling user reserved registers on high register count architecture

[Jason Eckhardt via llvm-dev]

Instead of feature bits, you might use a more generic cl::opt/cl::list (e.g., cl::multi_val or cl::CommaSeparated) to
specify something like "-reserve-regs 8 32" or "-reserve-regs=8,32". This way, the user could specify a range of
registers to reserve rather than each register individually. Bitvector UserReservedRegister would be set elsewhere
according to the global variable specified in your cl::opt/cl::list declaration.

________________________________
From: llvm-dev <llvm-dev-bounces at lists.llvm.org> on behalf of Braden Nelson via llvm-dev <llvm-dev at lists.llvm.org>
Sent: Saturday, March 27, 2021 9:22 PM
To: llvm-dev at lists.llvm.org <llvm-dev at lists.llvm.org>
Subject: [llvm-dev] Handling user reserved registers on high register count architecture

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I'm working with the Parallax Propeller 2, which has 496 allocatable
registers. Needless to say, I can't do this:


foreach i = {1-496} in
     def FeatureReserveR#i :
         SubtargetFeature<"reserve-r"#i, "UserReservedRegister[P2::R"#i#"]",
                          "true", "Reserve R"#i>;

So does anyone have a better idea?

Thanks, Braden.
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