[llvm-dev] [RFC] Upstreaming a proper SPIR-V backend

[Renato Golin via llvm-dev]

On Wed, 3 Mar 2021 at 18:41, Ronan KERYELL <ronan-list at keryell.fr> wrote:

> But perhaps you were considering in your sentence the case where with
> OpenMP/SYCL/CUDA/HIP you generate LLVM for the host code part and MLIR
> just for the hardware accelerator parts?


Just thinking out loud if clang couldn't be a hybrid front-end, emitting
LLVM IR and MLIR for different parts of the program (for example,
accelerators), and either use SPIRV (for supported accelerators) or lower
to LLVM IR (for the rest). This would allow us to use MLIR directly in
hybrid programming models (like OpenMP, OpenCL) and make real use of the
high-level optimisations in MLIR. Perhaps SYCL wouldn't fit here.

I'm just going back to the overall goal of MLIR and trying to see on our
current approach, what do we lower too soon to LLVM IR, so it could lower
to MLIR instead, piece wise, then lower to LLVM IR (or not) later.
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