[llvm-dev] MIPS instruction with optional flag

[Francesco Bertolaccini via llvm-dev]

I'm self-replying to this email because I was able to find a solution in
the end!
The way to make instructions "variadic" is to create aliases with
default arguments, so something like this:

  def SV_Q : SV_WT<0b111110, "sv.q $rt, $addr, wt">;
  def : MipsInstAlias<"sv.q $rt", (SV_Q MyOpnd:$rt, 0)>;

This makes it possible to pass either one or two arguments to sv.q

Francesco

On 21/06/2021 10:42, Francesco Bertolaccini wrote:
> I'm in the process of adding support for some custom instructions to the
> MIPS backend.
> 
> Some of the instructions I'm planning on adding support an optional
> flag, like so:
> 
>     sv.q C000, 16($s0)
>     sv.q C000, 16($s0), wt ; both should be accepted
> 
> Note that the 'wt' operand is not an identifier, it's a "keyword".
> 
> I haven't found the correct way to do it: at first, I thought of
> creating a custom operand
> 
>   def VFPUWriteThroughAsmOpnd : AsmOperandClass {
>     let Name = "WriteThrough";
>     let PredicateMethod = "isWriteThrough";
>     let ParserMethod = "parseWriteThrough";
>   }
> 
>   def VFPUWriteThrough : Operand<i32> {
>     let PrintMethod = "printWriteThrough";
>     let ParserMatchClass = WriteThroughAsmOpnd;
>     let OperandType = "OPERAND_IMMEDIATE";
>   }
> 
> in the hope that I could just declare the instruction like so
> 
>   def SV_Q : SV<0b111110, "sv.q $rt, $addr $wt">; // Note lack of comma
> 
> and detect the absence or presence of the comma in the parseWriteThrough
> method. This didn't work, and the parser still chokes when trying to
> parse statements which do not have the 'wt' flag.
> 
> I then tried to declare two different instructions
> 
>   def SV_Q : SV<0b111110, "sv.q $rt, $addr">;
>   def SV_Q_WT : SV_WT<0b111110, "sv.q $rt, $addr, wt">;
> 
> This failed too, this time in recognizing statements which _do_ have the
> wt flag. It seems like the second definition is ignored.
> 
> How can I implement this?
> Thanks,
> 
> Francesco
>