[llvm-dev] [X86] Is it possible to implicitly promote a virtual subregister to a super?

Constable, Scott D via llvm-dev llvm-dev at lists.llvm.org
Wed Jan 20 12:13:47 PST 2021

Thanks Tim and Craig. I tried both of your suggestions, and both generate the correct machine code for the test examples I have written. Looking at the documentation for SUBREG_TO_REG:

  /// SUBREG_TO_REG - This instruction is similar to INSERT_SUBREG except that
  /// the first operand is an immediate integer constant. This constant is
  /// often zero, because it is commonly used to assert that the instruction
  /// defining the register implicitly clears the high bits.

So I think I agree with Craig that the more natural solution is to stick with INSERT_SUBREG.



From: Craig Topper <craig.topper at gmail.com>
Sent: Wednesday, January 20, 2021 9:14 AM
To: Tim Northover <t.p.northover at gmail.com>
Cc: Constable, Scott D <scott.d.constable at intel.com>; llvm-dev at lists.llvm.org
Subject: Re: [llvm-dev] [X86] Is it possible to implicitly promote a virtual subregister to a super?

If there's no guarantee of a value for the upper bits don't you want INSERT_SUBREG? SUBREG_TO_REG says the upper bits are 0(or whatever the immediate says). Not that I've ever found a place that checks it.


On Wed, Jan 20, 2021 at 9:09 AM Tim Northover via llvm-dev <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> wrote:
On Wed, 20 Jan 2021 at 16:30, Constable, Scott D
<scott.d.constable at intel.com<mailto:scott.d.constable at intel.com>> wrote:
> The actual implementation I'm doing is a bit more complex than the example I provided for illustrative purposes. In my case, I don't need to care about the upper bits at all.

OK, in that case I think SUBREG_TO_REG is what you want. Something like

BuildMI(MBB, InsertPt, Loc, TII->get(X86::SUBREG_TO_REG), ExtendedReg)
    .addImm(0) // Never been entirely sure what this was here for.
It's always 0.

then use ExtendedReg (a GR32 vreg) in the compare.


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