[llvm-dev] Questions about inline assembly parameter mapping in llvm IR
chengeng (C) via llvm-dev
llvm-dev at lists.llvm.org
Mon Feb 22 05:12:02 PST 2021
Dear All,
I compiled the following source code:
typedef unsigned int uint32_t;
typedef unsigned char uint8_t;
int rte_atomic32_cmpset(volatile uint32_t *dst, uint32_t exp, uint32_t src)
{
uint8_t res;
asm volatile(
"lock ; "
"cmpxchgl %[src], %[dst];"
"sete %[res];"
: [res] "=a" (res), /* output */
[dst] "=m" (*dst)
: [src] "r" (src), /* input */
"a" (exp),
"m" (*dst)
: "memory"); /* no-clobber list */
return res;
}
And got the following IR:
define dso_local i32 @rte_atomic32_cmpset(i32* %dst, i32 %exp, i32 %src) local_unnamed_addr #0 {
entry:
%0 = tail call i8 asm sideeffect "lock ; cmpxchgl $2, $1;sete $0;", "={ax},=*m,r,{ax},*m,~{memory},~{dirflag},~{fpsr},~{flags}"(i32* %dst, i32 %src, i32 %exp, i32* %dst) #1, !srcloc !2
%conv = zext i8 %0 to i32
ret i32 %conv
}
However, I found the following 3 information does not match:
1. In the assembler template there are 3 operands (prefixed with $)
2. In the constrains, there are 2 outputs and 3 inputs
3. In the parameter list, there are 4 parameters.
Is there some connections between these 3 information? How to interpret them?
Best,
Geng
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