[llvm-dev] LLVM AsmMatcher / AsmParser question - register number with dot modifier

Przemyslaw Ossowski via llvm-dev llvm-dev at lists.llvm.org
Thu Feb 11 09:30:31 PST 2021


Hi,



I am trying to implement support for asm matching for instruction which
uses three registers (operands).

And sometimes the register could have a suffix like .M.



For example:

add x1, x2, x3

and sometimes:

add x1.M, x.2, x.3



For the second case I’ve defined instruction as follows:

 (outs REGCLASS:$x1),

 (ins REGCLASS:$x2, REGCLASS:$x3),

“add\t\t${x1}.M, ${x2}, ${x3}"



But AsmParser doesn’t recognize the case with .M returning "invalid operand
for instruction".



Should I define .M as separate operand for example:

(outs REGCLASS:$x1),

(ins REGCLASS:$x2, REGCLASS:$x3, REGMOD:$MOD)

“add\t\t${x1}.${MOD}, ${x2}, ${x3}"



But in such case it still doesn’t recognize “x1.M”, because as I understand
it separates operands just with “,” (comma).



What approach should I take?

Is there any example of such a case in any Target?



Thanks,

Przemek
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