[llvm-dev] Questions about relaxation in MC

[Philip Reames via llvm-dev]

If done in the assembler, this is branch relaxation.  You need to 
implement the calls backs mayNeedRelaxation, and relaxInstruction on 
your target MCAsmBackend.  The iteration relaxation logic already 
exists, see the generic MC code.

Philip

On 10/5/20 8:20 PM, Kai Wang via llvm-dev wrote:
> Correct the title.
>
> On Tue, Oct 6, 2020 at 11:11 AM Kai Wang <kai.wang at sifive.com 
> <mailto:kai.wang at sifive.com>> wrote:
>
>     Hi all,
>
>     In RISC-V ISA, the range of conditional branches is within 4KiB.
>     In current implementation, if the branch target is out of range,
>     LLVM MC will issue an error message to tell users it could not
>     resolve the fixup record. I have compared the result with the GNU
>     assembler. GNU assembler will convert the branch to inverted one
>     plus jump to make the branch possible. The range of unconditional
>     jump is 1MiB. It looks like
>
>     ##########################
>     bne a0, a1, FAR_BRANCH
>     …
>     FAR_BRANCH:
>
>     converted to
>
>     ##########################
>     beq a0, a1, SKIP_J
>     j FAR_BRANCH
>     SKIP_J:
>     …
>     FAR_BRANCH:
>
>     I found there is a target hook, relaxInstruction, that tries to
>     achieve the similar goal. However, the target hook only replaces
>     one MCInst with another one with a larger branch range. For
>     example, c.beqz will be converted to beq in the RISC-V backend if
>     the fixup value is out of range. There seems no target hook to
>     convert one MCInst to a complex pattern in LLVM MC. Do I miss
>     something obvious?
>
>     I found there is a target hook, finishLayout, to manipulate the
>     code generated. Does it make sense to implement the feature in
>     finishLayout? Or is there any better idea to achieve the
>     conversion? Thanks a lot.
>
>     Best,
>     Kai
>
>
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