[llvm-dev] TableGen machine code emitter backend

[Jason Eckhardt via llvm-dev]

James Malloy added support for this recently.  I'm using it in a downstream back-end today, as are others.
(Similarly, Daniel Sanders extended the FixedLenDecoderEmitter to support instruction words > 64 bits).

commit 60aadd19cbffc3793476a14d2e3529214119e2f5
Author: James Molloy <jmolloy at google.com>
Date:   Sun Sep 15 08:35:08 2019 +0000

    [CodeEmitter] Support instruction widths > 64 bits

    Some VLIW instruction sets are Very Long Indeed. Using uint64_t constricts the Inst encoding to 64 bits (naturally).

    This change switches CodeEmitter to a mode that uses APInts when Inst's bitwidth is > 64 bits (NFC for existing targets).

    When Inst.BitWidth > 64 the prototype changes to:

      void TargetMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
                                                      SmallVectorImpl<MCFixup> &Fixups,
                                                      APInt &Inst,
                                                      APInt &Scratch,
                                                      const MCSubtargetInfo &STI);

    The Inst parameter returns the encoded instruction, the Scratch parameter is used internally for manipulating operands and is exposed so that the underlying storage can be reused between calls to getBinaryCodeForInstr. The goal is to elide any APInt constructions that we can.

    Similarly the operand encoding prototype changes to:

      getMachineOpValue(const MCInst &MI, const MCOperand &MO, APInt &op, SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI);

    That is, the operand is passed by reference as APInt rather than returned as uint64_t.

    To reiterate, this APInt mode is enabled only when Inst.BitWidth > 64, so this change is NFC for existing targets.

    llvm-svn: 371928



________________________________
From: llvm-dev <llvm-dev-bounces at lists.llvm.org> on behalf of Paul C. Anagnostopoulos via llvm-dev <llvm-dev at lists.llvm.org>
Sent: Sunday, November 29, 2020 3:17 PM
To: llvm-dev at lists.llvm.org <llvm-dev at lists.llvm.org>
Subject: [llvm-dev] TableGen machine code emitter backend

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In my travels through the TableGen backends, I just learned that the machine code emitter can build instructions no longer than 8 bytes. Is there any interest in extending this to, say, 16 bytes?

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