[llvm-dev] Custom Instruction Cost Model to LLVM RISC-V Backend

[Henrik Olsson via llvm-dev]

Hi Bandhav,

While I'm unfamiliar with the details of codegen and cost modelling in
LLVM, it is possible to declare multiple address spaces for a target, mark
pointers as belonging to a specific address space, and cast between them.
To quote the language reference "For targets that support them, address
spaces may affect how optimizations are performed and/or what target
instructions are used to access the variable.", which sounds quite hopeful
for your usecase. If nothing else, you could probably model the loads from
different address spaces as being different instructions, even if they are
in the end the same instruction in the output machine code, and tag them
with different costs.

Hope this helps,
Henrik

On Tue, May 26, 2020 at 4:55 AM Bandhav Veluri via llvm-dev <
llvm-dev at lists.llvm.org> wrote:

> Hi,
>
> I’m working on a RISC-V architecture that has instruction costs different
> from those in the default cost model. Is there an out-of-source way to
> provide llc with custom cost model? Or, does this need a change in LLVM
> backend?
>
> Also, the cost model is not totally static. For example, loads from
> 0x1000-0x1ffc take 1 cycle, whereas loads from address > 0x80000000, take
> 10-100 cycles. Is it possible to model these costs in the scheduler?
> Requiring programmer to define custom pointer types to mark pointers, to
> one or the other address space, is okay. Is there a way to model different
> costs for different pointer types?
>
> Thank you,
> Bandhav
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