[llvm-dev] Use Galois field New Instructions (GFNI) to combine affine instructions

[Craig Topper via llvm-dev]

I'm guessing AggressiveInstCombine only runs once in the pipeline and its
probably before the vectorizers. Its existing transforms probably output
things the vectorizer can understand and vectorize. In your case you're
fully dependent on vectorized code.

We don't like to form target specific intrinsics in the middle end
pipeline. We'd prefer to do something in the X86 specific IR pipeline or
Machine IR pipeline run by llc. Or have a generic concept in IR that we can
express like llvm.ctlz, llvm.cttz, llvm.popcnt or llvm.bitreverse. We have
methods in TargetTransformInfo to query for targets supporting them or in
the worst case we're able to generate reasonable code if the target doesn't
support it natively.

I'll try to point some more people here at Intel towards this thread.

~Craig


On Mon, May 18, 2020 at 11:30 AM Adrien Guinet via llvm-dev <
llvm-dev at lists.llvm.org> wrote:

> On 5/18/20 8:24 PM, Craig Topper wrote:
> > I can tell you that your avx512 issue is that v64i8 gfni instructions
> also
> > require avx512bw to be enabled to make v64i8 a supported type. The C
> > intrinsics handling in the front end know this rule. But since you
> > generated your own intrinsics you bypassed that.
>
> Indeed that's the issue... I was stick with what Intel announces here
> (
> https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=gf2p&expand=2907),
> but
> I guess I should have checked the C intrinsics.
>
> I will fix my code to verify the presence of avx512bw if I ever need v64i8.
>
> Thanks for the hint!
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