[llvm-dev] Why the indirect branch instruction is removed from the emitted binary?

[n3v3rm03 via llvm-dev]

Hi,

I am trying to write a pass to convert any branch instructions to indirect
branch instructions for ARM / AArch64.
I managed to generate a llvm IR like this:
  %7 = icmp ne i8** %2, null
  %8 = and i1 %6, %7
  %9 = select i1 %8, i8* blockaddress(@_Z4testPKcmPPc, %10), i8*
blockaddress(@_Z4testPKcmPPc, %26)
  indirectbr i8* %9, [label %10, label %26]

But when this IR is translated into AArch64 machine codes, I only get
something like:
CBZ X1, loc_XX

It seems the select and indirectbr instructions are optimized in the
backend.
What I expected is something like:
MOV X2, loc_XX
B.NE X2

Does anyone know how can I achieve this?
Thanks!
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