[llvm-dev] How to add new AVR targets?

Dylan McKay via llvm-dev llvm-dev at lists.llvm.org
Wed Mar 4 02:16:26 PST 2020


> The new are of xmega3 architecture, which is already included. So this
> should be simple.
>
> Where is the information about ISR-vector table, SRAM addresses and so
> on stored?


At the moment, this is not implemented in LLVM; these details are left to
the frontend. Clang/compiler-rt does not include the usual ISR table or
AVR-specific startup routines to initialize SRAM from program memory -
avr-clang-compiled executables must currently be linked with
avr-libc/libgcc. Users of the AVR-Rust frontend have implemented these
tables and routines in assembly in each source repository, or more commonly
just linked against avr-libc and GCC's AVR CRT libraries. Ideally, we would
provide our own implementation of these independent of the GCC/GNU
ecosystem in somewhere like compiler-rt.

Hope that helps,

Regards,
Dylan

On Wed, Mar 4, 2020 at 11:10 PM Wilhelm Meier <wilhelm.meier at hs-kl.de>
wrote:

> Thanks!
>
> The new are of xmega3 architecture, which is already included. So this
> should be simple.
>
> Where is the information about ISR-vector table, SRAM addresses and so
> on stored?
>
> --
> Wilhelm
>
> Am 04.03.20 um 11:03 schrieb Dylan McKay:
> > Hey Wilhelm,
> >
> > This should be possible by editing the 'AVRDevices.td' [1]TableGen
> > definitions to add an entry for the newer chip types. You will need to
> > instruct LLVM which features are available on the chip (such as extended
> > LPM support), cross referencing with the instruction set manual for the
> > AVR MCU you're adding to figure out what is allowed and what is not.
> >
> > If there are newer instructions not yet supported by the AVR backend, or
> > if their are device-specific constraints not already handled by the
> > backend in its AVRDevices feature declarations, then you will need to
> > either extend the backend to support it, or declare the chip with a
> > lower level of support than is strictly required as a workaround.
> >
> > Then after that, it should be possible to recompile the backend and
> > target the new chip type with 'llc -march=avr -mcpu=tiny1614'. for
> example.
> >
> >   * [1] -
> >
> https://github.com/llvm/llvm-project/blob/96fdc65dc4b19944079fa7f61ea52e4e0f999985/llvm/lib/Target/AVR/AVRDevices.td#L255
> >
> >
> > Regards,
> > Dylan
> >
> >
> > On Wed, Mar 4, 2020 at 10:19 PM Wilhelm Meier via llvm-dev
> > <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote:
> >
> >     I'm beginning to use the AVR backend. I ran into the problem, that
> newer
> >     (tiny1, mega0) ┬ÁC as a tiny1614 are not supported. How do I add
> these to
> >     the AVR backend?
> >
> >     Thanks!
> >     _______________________________________________
> >     LLVM Developers mailing list
> >     llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>
> >     https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
> >
>
> --
> Wilhelm Meier
> Vor dem Hirschberg 5
> D-66459 Kirkel-Limbach
> 0151-12414315
>
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