[llvm-dev] How is a large immediate divided in the arm backend

[Ben Shi via llvm-dev]

Hello,


I often see "add %i32 %0, 0x1fe" was mapped to


add R0, R0, 0xff
add R0, R0, 0xff


The 0x1fe is divided to two 0xff, since 0xff is small enough to be encoded in the instruction code, while 0x1ff has to be put in the constant pool.


Where does this break implemented?


Ben 

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