[llvm-dev] tablegen generated enums in tablegen

Chris Sears via llvm-dev llvm-dev at lists.llvm.org
Mon Jun 29 20:18:27 PDT 2020


Hal and Nicolai

I figured out my problem and I'm using TSFlags. Basically if I want to
indicate register R8, I encode it as 8 in some bits in TSFlags. Then in my
Disassembler that 8 indexes into a lookup table and returns Target::R8.
This works for my backend and now I'm on to fixups and relocs. It may seem
that a uint64_t isn't a lot of bandwidth to communicate with between the
TableGen defs and the MC layer, but I don't need a lot.

I tried using the MCInst operand list but I wasn't convinced I really
understood it. It seems to me that an operand has a fairly general
definition. I also tried various plausible escape syntaxes in TableGen but
none worked. TSFlags has the virtue of being reserved for the backend's use
and, in my case, working.
C
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