[llvm-dev] [ARM] Thumb code-gen for 8-bit imm arguments results in extra reg copies

[Tim Northover via llvm-dev]

On Tue, 16 Jun 2020 at 10:23, Prathamesh Kulkarni via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> (b) Modifies RegisterCoalescer::reMaterializeTrivialDef and
> TargetInstrInfo::isReallyTriviallyReMaterializableGeneric to check
> for single live def, instead of single def.

This seems dodgy to me. The instruction does also change CPSR so for
the transformation to be valid you have to know that register is dead
where the new instruction is being inserted. As far as I can tell the
hasOneDef check in reMaterializeTrivialDef is a simple heuristic to
keep the analysis local and avoid dealing with such issues.

I also don't know how other users of the rematerializable property
will cope with a wider range of
isReallyTriviallyReMaterializableGeneric instructions.

Once you start having to consider the surroundings, is it still
"trivial"? I honestly don't know right now.

Cheers.

Tim.