[llvm-dev] [RFC] Requiring explicit address space arguments for PointerType

[Johannes Doerfert via llvm-dev]

On 7/24/20 3:06 PM, Chris Lattner via llvm-dev wrote:
> I agree, improving this makes sense.
>
> Alexander, I don’t think that “LLVM_DEFAULT_AS_PARAM” is the right way to go, I would just remove the “ = 0” default parameter entirely.

+1 on requiring everyone to provide the AS all the time. Something 
similar helped to remove alignment problems and confusion not too long ago.


> -Chris
>
>> On Jul 23, 2020, at 11:02 AM, Nicolai Hähnle via llvm-dev <llvm-dev at lists.llvm.org> wrote:
>>
>> Hi Alex,
>>
>> I'd be very much in favor of this, thanks for pushing ;)
>>
>> On Wed, Jul 22, 2020 at 1:55 PM Alexander Richardson via llvm-dev
>> <llvm-dev at lists.llvm.org> wrote:
>>> (5?) Depending on how we feel about out-of-tree consumers, remove the
>>> LLVM_DEFAULT_AS_PARAM(AddressSpace) macros and require the argument to
>>> always be present. Adding the argument is compatible with older LLVM
>>> versions so it should be possible to do so without version #ifdefs. I
>>> think we should probably reduce the amount of changes required by
>>> out-of-tree consumers and keep the optional default, but it would
>>> obviously be nice to eventually remove the #ifdefs from inside LLVM.
>> As you say, since consumers can be changed in a way where the new
>> consumer version still builds against older LLVM versions, I think
>> this is reasonable. It would be great to find a way where consumers
>> get deprecation warnings for some period of time, but I can't think of
>> an easy way to do that.
>>
>> Cheers,
>> Nicolai
>>
>>
>>> Does this sound like a sensible approach? Should I also attempt to
>>> implement steps 4 and 5 or is 1-3 sufficient?
>>>
>>> I would be great if we could land this upstream as it will
>>> significantly reduce the maintenance burden for our CHERI LLVM and
>>> should also prevent AVR issues such as e.g.
>>> https://reviews.llvm.org/rG215dc2e203341f7d1edc4c4a191b048af4ace43d
>>>
>>> Thanks,
>>> Alex
>>>
>>> [1] CHERI is currently available for MIPS and RISC-V and will soon be
>>> available on the upcoming Arm Morello board
>>> (https://developer.arm.com/architectures/cpu-architecture/a-profile/morello).
>>> _______________________________________________
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>>
>>
>> -- 
>> Lerne, wie die Welt wirklich ist,
>> aber vergiss niemals, wie sie sein sollte.
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