[llvm-dev] How to optimize out the duplicated memory load instructions?

[Johannes Doerfert via llvm-dev]

Hi Terry,


various LLVM passes that run with O3 would do this for you, assuming 
they could prove correctness.

FWIW, the address is the same, so it is (most likely) an aliasing 
problem. I assume

   store i64 0, i64* %data_ptr63, align 8

might clobber the loaded location so we do not reuse the first load. You 
use alias metadata in IR or

`noalias` (in IR) [= `restrict` (in C/C++)] attributes for arguments to 
help the alias analysis.


Is this what you were looking for?


~ Johannes


On 7/23/20 10:25 AM, Terry Guo via llvm-dev wrote:
> Hi there,
>
> The raw input IR is composed by my tool and the below one is produced by
> llvm opt tool with O3 optimization level. I am pretty sure that the two
> load instructions( %mem_base60  and  %mem_base66) are referring to the same
> memory location. How can I instruct llvm optimization pass to optimize out
> the  %mem_base66 and make the subsequent code reuse the  %mem_base60? I
> tried with metadata 'alias.scope' and 'noalias' and it doesn't help. Thanks
> for any advice.
>
> 392542 check_exce_succ59:                                ; preds =
> %check_exce_succ40
> **392543   %mem_base60 = load i8*, i8** %mem_base_addr_ptr, align 8
> 392544   %offset161 = add i32 %call56, 4
> 392545   %11 = sext i32 %offset161 to i64
> 392546   %maddr62 = getelementptr inbounds i8, i8* %mem_base60, i64 %11
> 392547   %data_ptr63 = bitcast i8* %maddr62 to i64*
> 392548   store i64 0, i64* %data_ptr63, align 8
> **392549   %mem_base66 = load i8*, i8** %mem_base_addr_ptr, align 8
> 392550   %offset167 = add i32 %call56, 12
> 392551   %12 = sext i32 %offset167 to i64
> 392552   %maddr68 = getelementptr inbounds i8, i8* %mem_base66, i64 %12
> 392553   %data_ptr69 = bitcast i8* %maddr68 to i32*
> 392554   store i32 %call, i32* %data_ptr69, align 8
>
> BR,
> Terry
>
>
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