[llvm-dev] Limited use types in the back end

[Matt Arsenault via llvm-dev]

> On Jan 27, 2020, at 14:03, Nemanja Ivanovic <nemanja.i.ibm at gmail.com> wrote:
> 
> Yeah, the operations are done on either pairs or 4-tuples of consecutive vector registers.
> 
> What do you think about the idea of creating separate pair/quad types in the IR and SDAG to represent these? That way the only way such a type would come into existence would be with the intrinsics.

You don’t need to add any new type You can already use a struct which will expand to multiple registers

-Matt