[llvm-dev] RISC-V LLVM sync-up call 23rd Jan 2020

[Alex Bradbury via llvm-dev]

For background on these calls, see
<http://lists.llvm.org/pipermail/llvm-dev/2019-September/135087.html>.

Reminder: the purpose is to co-ordinate between active contributors.
If you have support questions etc then it's best to post to llvm-dev.

We have a call each Thursday at 4pm GMT, via
<https://meet.google.com/ske-zcog-spp>.

I've created a shared calendar which may help in keeping track, which
is accessible at:
  * <https://calendar.google.com/calendar/b/1?cid=bG93cmlzYy5vcmdfMG41cGtlc2ZqY25wMGJoNWhwczFwMGJkODBAZ3JvdXAuY2FsZW5kYXIuZ29vZ2xlLmNvbQ>
  * <https://calendar.google.com/calendar/ical/lowrisc.org_0n5pkesfjcnp0bh5hps1p0bd80%40group.calendar.google.com/public/basic.ics>

Issues to discuss today include the following:
* LTO status and plan. See
http://lists.llvm.org/pipermail/llvm-dev/2020-January/138450.html and
- patches https://reviews.llvm.org/D72755
https://reviews.llvm.org/D72768 https://reviews.llvm.org/D70837 are
all landed and proposed for 10.0. Thanks to Sam and Zakk!
* Backport requests for 10.0
  * LTO (see above)
  * Fix for evaluating pcrel_lo against global and weak symbols
<https://bugs.llvm.org/show_bug.cgi?id=44631>
  * Asked if LLD folks are happy for https://reviews.llvm.org/D71820
to be backported, which emits an error for R_RISCV_ALIGN
  * Please highlight anything else you think of
* Scheduler status and backport possibility https://reviews.llvm.org/D68685
* Heads up: Rust codegen for riscv lp64d landed last year
https://github.com/rust-lang/rust/pull/66661 and Sam had been feeding
back on some ABI lowering issues
* Update: proposal to disallow ilp32e with the D instruction set
extension was accepted
https://github.com/riscv/riscv-elf-psabi-doc/pull/127
* Moving forwards with vector intrinsics (topic proposed by Michael at
the last meeting)

Best,

Alex