[llvm-dev] Legalizing vector types
Sebastien Le Duc via llvm-dev
llvm-dev at lists.llvm.org
Tue Jan 7 05:30:48 PST 2020
Thanks or your reply
Actually for v8i8 it already goes thru SplitVector/Scalarize code path even
with the default Vector Action, because there is no legal vector type to
promote to or to widen to.
But then getVectorTypeBreakdown will return 8 x i32 in our case because we
don’t support any i8 vector.
My understanding is that currenty LLVM supports only 3 cases to legalize
vectors:
*) promoting to a vector type that has the same number of elts but a wider
elt type
*) widening to a vector type that has the same elt type
*) splitting to smaller vectors with the same elt type
It does not support cases that would imply 2 of the above steps, in my case
promoting v8i8 first to v8i16, then splitting it to 2xv4i16
That's why the only solution I found is to make v8i16 legal, this way v8i8
is promoted to v8i16
But then since v8i16 is not natively supported in our architecture, I have
to add patterns to generate code for all v8i16 operations that will use 2
v4i16 instruction
-----Original Message-----
From: Eli Friedman [mailto:efriedma at quicinc.com]
Sent: Monday, January 6, 2020 8:44 PM
To: Sebastien Le Duc; llvm-dev
Subject: RE: [llvm-dev] Legalizing vector types
You should be able to override TargetLowering::getPreferredVectorAction to
prefer splitting v8i8.
-Eli
> -----Original Message-----
> From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of Sebastien Le
> Duc via llvm-dev
> Sent: Friday, January 3, 2020 8:02 AM
> To: 'llvm-dev' <llvm-dev at lists.llvm.org>
> Subject: [EXT] [llvm-dev] Legalizing vector types
>
> Hi all,
> I am working on a target that has support for v4i16 vectors, and no
> support for v4i8 / v8i8 / v8i16
>
> V4i8 is promoted to v4i16 which is nice
> V8i16 is split to 2 x v4i16 which is nice as well
>
> Now v8i8 is scalarized, which is not so nice.
> Ideally I would like v8i8 to be first promoted to v8i16 then split to
> 2xv4i16 (or split to 2xV4i8 then promoted to 2xv4i16)
>
> Is there a way to achieve that? I tried to figure out how to do it, but
> the only way I found is to make v8i16 legal, and handle the splitting to
> 2xv4i16 as patterns, which looks to me to be a lot of useless work…
>
> Thanks in advance.
>
> Regards,
> Sebastien
>
>
>
>
>
>
>
> Sébastien Le Duc
> CoreSW Team Manager
> kalray_logo <http://www.kalray.eu/> Kalray S.A.
>
> www.kalray.eu
>
> Phone : 06 84 43 07 00
> sleduc at kalray.eu Follow us twitter_logo
> <https://twitter.com/Kalrayinc> linkedin_logo
> <http://www.linkedin.com/company/kalray> 180 Avenue de l'Europe
> 38330 Montbonnot FRANCE
> <http://www.kalray.eu/news-7/news/latest>
> This message contains information that may be privileged or confidential
> and is the property of the Kalray S.A. It is intended only for the person
> to whom it is addressed. If you are not the intended recipient, you are
> not authorized to print, retain, copy, disseminate, distribute, or use
> this message or any part thereof. If you receive this message in error,
> please notify the sender immediately and delete all copies of this
> message.
>
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
More information about the llvm-dev
mailing list