[llvm-dev] COPYs between register classes

Craig Topper via llvm-dev llvm-dev at lists.llvm.org
Sat Feb 22 16:14:06 PST 2020


Could you emit a target specific ISD opcode where the CopyToReg is created?
Then you could isel that ISD opcode however you want.

~Craig


On Sat, Feb 22, 2020 at 3:45 PM Jonas Paulsson via llvm-dev <
llvm-dev at lists.llvm.org> wrote:

> Hi,
>
> On SystemZ there are a set of "access registers" that can be copied in
> and out of 32-bit GPRs with special instructions. These instructions can
> only perform the copy using low 32-bit parts of the 64-bit GPRs. As
> reported and discussed at https://bugs.llvm.org/show_bug.cgi?id=44254,
> this is currently broken due to the fact that the default register class
> for 32-bit integers is GRX32, which also contains the high 32-bit part
> registers.
>
> I have tried to find a simple way to constrain the register class of
> such copies (also at -O0), but this turned out to not be quite simple.
> Just selecting a pseudo instruction with a custom inserter does not seem
> to work since CopyToReg/CopyFromReg have special handlings in InstrEmitter.
>
> I then tried in SystemZDAGToDAG.cpp to select a CopyToReg to (CopyToReg
> COPY_TO_REGCLASS), which worked fine. But I could not get the same
> results with CopyFromReg. (COPY_TO_REGCLASS CopyFromReg) only resulted
> in a later COPY into GR32, but the COPY from the Access register was
> still first made to GRX32.
>
> One alternative might be to let InstrEmitter deduce the needed register
> class for a CopyFromReg if there is only one user which is a
> COPY_TO_REGCLASS. I thought this seemed a bit messy, so I instead tried
> adding a new TargetRegisterInfo hook that is used in InstrEmitter when
> emitting CopyToReg/CopyFromReg nodes (https://reviews.llvm.org/D75014).
>
> Does this make sense, or is there a better way?
>
> A related question is if the target is required to be able to implement
> *any* move between register classes?
>
> Thanks,
>
> Jonas
>
>
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