[llvm-dev] Using a MachineInstruction Address

[Jason Eckhardt via llvm-dev]

I have a somewhat similar scenario in a downstream back-end. You might try #2 and then call one of:
  /// Set this block to reflect that it potentially is the target of an indirect branch.
  void setHasAddressTaken() { AddressTaken = true; }

  /// Test whether this block must have its label emitted.
  bool hasLabelMustBeEmitted() const { return LabelMustBeEmitted; }



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From: llvm-dev <llvm-dev-bounces at lists.llvm.org> on behalf of Diogo Sampaio via llvm-dev <llvm-dev at lists.llvm.org>
Sent: Tuesday, December 1, 2020 6:06 PM
To: llvm-dev at lists.llvm.org <llvm-dev at lists.llvm.org>
Subject: [llvm-dev] Using a MachineInstruction Address

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Hi,
Is there a straight-forward way to obtain an arbitrary MachineInstruction address and maintain it updated along the backend optimizations, even if it is in the middle of a MachineBasicBlock?
I have an instruction that takes a relative address. E.g

BB0:
     myInstruction BBN + 4*x

BBN:
     ... x instructions ...
     target_instruction       <<=== it points to here.

The issues I have are:
1) I only see the ability to obtain basic-block addresses/labels, and these are only updated in terminator instructions. So by change that basic block is renamed/merged the value in myInstruction gets corrupt.
2) Even if I set-up the instruction at the top of a basic block, eventually the BB gets merged, so just pointing to the BB label is not enough.

I do see MCSymbol, but I don't get it. It seems to be resolved during asm printing.

Thanks,


Diogo Sampaio
Senior Compiler Engineer • Kalray
dsampaio at kalrayinc.com • www.kalrayinc.com<https://www.kalrayinc.com>

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