[llvm-dev] AMDGPU workgroup size as metadata

Matt Arsenault via llvm-dev llvm-dev at lists.llvm.org
Thu Apr 30 17:32:20 PDT 2020

> On Apr 30, 2020, at 15:09, Frank Winter via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> From LLVM IR, how can you get the 'workgroup size' value?
> It seems to be set by the AMDGPU backend as metadata since in AMDGPUMetadata.h there are things defined like
> constexpr char ReqdWorkGroupSize[] = "ReqdWorkGroupSize";
> and
> struct Metadata final {
>   /// 'reqd_work_group_size' attribute. Optional.
>   std::vector<uint32_t> mReqdWorkGroupSize = std::vector<uint32_t>();
>   ...
> }
> Is this metadata set to the kernel function or to the module?
> What IR instructions would give access to the value of, say, the workgroup size in dimension x?
> Frank

The code object metadata is only for statically known workgroup size information The metadata you found here corresponds to !reqd_work_group_size, corresponding to the OpenCL attribute of the same name. We have a variety of other static attributes useful related to workgroup sizes, as documented here: https://llvm.org/docs/AMDGPUUsage.html#llvm-ir-attributes <https://llvm.org/docs/AMDGPUUsage.html#llvm-ir-attributes>. The "uniform-work-group-size” (corresponding to the OpenCL flag -cl-uniform-work-group-size) may also be of interest.

Dynamically, there isn’t a single instruction to get the group size and it depends on the runtime/driver how to implement it. You need to get a pointer to somewhere, and load from it. For HSA/ROCm, these are loaded from an ABI struct pointed to by a special kernel input SGPR. Recently the core implementation was moved into clang builtin so we can annotate the load with !range metadata: https://github.com/llvm/llvm-project/blob/a1bd5cd539f9e2fd34e522b848e751342985e882/clang/lib/CodeGen/CGBuiltin.cpp#L13985 <https://github.com/llvm/llvm-project/blob/a1bd5cd539f9e2fd34e522b848e751342985e882/clang/lib/CodeGen/CGBuiltin.cpp#L13985>. You can see how these are used here: https://github.com/RadeonOpenCompute/ROCm-Device-Libs/blob/amd-stg-open/ockl/src/workitem.cl <https://github.com/RadeonOpenCompute/ROCm-Device-Libs/blob/amd-stg-open/ockl/src/workitem.cl>

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