[llvm-dev] Questions on ifconversion and predication
Bagel via llvm-dev
llvm-dev at lists.llvm.org
Fri Apr 10 10:43:00 PDT 2020
EarlyIfConversion is too early for my use. It does appear that perhaps
IfConversion can be used prior to register allocation. There is a line
PreRegAlloc = MRI->isSSA();
I don't think any in-tree architectures use IfConverter pre register
allocation, but perhaps there are out-of-tree uses?
On 4/7/20 3:17 PM, jingu kang wrote:
> Hi Bagel
> As far as I know, the EarlyIfConversion pass is used before register
> allocation. It works on SSA form and it does not use predication.
> The IfConversion pass is used after register allocation and it uses
> predication. Unfortunately, it does not support multiple predication.
> I hope it helps you.
> JinGu Kang
> 2020년 3월 24일 (화) 오후 6:22, Bagel via llvm-dev <llvm-dev at lists.llvm.org>님이 작성:
>> Assume an architecture that has multiple condition code registers, e.g., powerpc.
>> Now assume that there are predicate instructions like thumb2, but can specify
>> which condition code register they refer to.
>> Now also assume that these predicate instructions themselves are predicatible,
>> if executed they change the current predication state.
>> Can LLVM handle multiple levels of predication?
>> When is IfConversion used and when is EarlyIfConversion used?
>> Is there any documentation on this?
>> LLVM Developers mailing list
>> llvm-dev at lists.llvm.org
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