[llvm-dev] LiveInterval error with 2 dead defs

[Arsenault, Matthew via llvm-dev]

Hi,

I’m hitting a machine verifier error in a trivial testcase which I don’t understand. There are 2 dead defs of the same register:
---
name:            multiple_connected_compnents_dead
tracksRegLiveness: true
body:             |
  bb.0:
    dead %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
    dead %0:vgpr_32 = V_MOV_B32_e32 1, implicit $exec

...

The live intervals look OK to me with 1 valno per instruction, for the life of the instruction like I would expect. The verifier does not like it however:

$ llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -run-pass=machine-scheduler -o - -verify-misched foo.mir

# Before machine scheduling.
********** INTERVALS **********
%0 [16r,16d:1)[32r,32d:0)  0 at 32r 1 at 16r weight:0.000000e+00
RegMasks:
********** MACHINEINSTRS **********
# Machine code for function multiple_connected_components_dead: NoPHIs, TracksLiveness

0B           bb.0:
16B          dead %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
32B          dead %0:vgpr_32 = V_MOV_B32_e32 1, implicit $exec

# End machine code for function multiple_connected_components_dead.

*** Bad machine code: Multiple connected components in live interval ***
- function:    multiple_connected_components_dead
- interval:    %0 [16r,16d:1)[32r,32d:0)  0 at 32r 1 at 16r weight:0.000000e+00
0: valnos 0
1: valnos 1
LLVM ERROR: Found 1 machine code errors.

What is the problem here?

-Matt
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