[llvm-dev] What's the best way to describe a non-operand flag field in instructions?

[Iru Cai via llvm-dev]

Hello,

I'm working with a new ISA. In this ISA, some instructions have some flag
bits that control the behavior of the instruction.

If I enumerate all of the bits, there will be 2^N (N is the number of
flags) instructions to write in the td file. Currently In my code,
these kind of instructions are written as "(outs Reg:$rt), (ins Reg:$rs,
Reg:$rd, Flag:$flag)" and there is another method to
decode the flag and print it to asm. However, I think it not so elegant,
and I can not reuse it for CodeGen.

Is there any better way to work with this situation?

Thanks,
Iru

-- 
My website: https://vimacs.lcpu.club

Please do not send me Microsoft Office/Apple iWork documents. Send
OpenDocument instead! http://fsf.org/campaigns/opendocument/
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20190904/d1af7f28/attachment.html>