[llvm-dev] DetectDeadLanes is undefing used operands - am I violating an unspoken register hierarchy rule?

[via llvm-dev]

I've spent some time trying to understand LaneBitmasks sufficiently to
understand why DetectDeadLanes is undefing this def-use chain (and many like
it):

	(%11 mask=0x0) %11:rwb = AND.
	(%8 mask=0x2) %8:rwf_all = COPY %11.sub_l1:rwb
	$r0f = COPY %8:rwf_all

Where:

	rwf_all is an i1
	r0f is in class rwf_all
	rwb is an i8, with a single subregister representing the lowermost
bit, sub_l1.
	getMaxLaneMaskForVReg(rwf_all) == 0x2 (initial value for %8)

The issue appears to be caused by addUseLanesOnOperand:

	composeSubRegIndexLaneMask(sub_l1, 0x2) == 0x4
	which is masked by MRI->getMaxLaneMaskForVReg(%11) = 0x2
	0x4 & 0x2 yielding 0x0 for %11.

The pass then goes ahead and marks a bunch of things undef/dead, which of
course results in a faulty program.

The one suspicion I have is that it is related to the nature of the rwf_all
class. Every register in rwb has a subregister inside of rwf_all, but not
vice versa. Specifically, rwf_all also includes some flags that are entirely
standalone, not contained within any other register. I believe this is
standard, but is it related to my problem?

-- I also note this comment, within determineInitialDefinedLanes:

    // COPY/PHI can copy across unrelated register classes (example:
float/int)
    // with incompatible subregister structure. Do not include these in the
    // dataflow analysis since we cannot transfer lanemasks in a meaningful
way.

Which may apply to my case, however isCrossCopy is satisfied that rwf_all
and sub_l1::rwb is _not_ a cross copy, as getMatchingSuperRegClass(rwb,
rwf_all, sub_l1)==rwb.

Any insight is appreciated, thank you.