[llvm-dev] register spilling and printing live variables

[Priyanka Panigrahi via llvm-dev]

Thank you for ur reply.
Here is a simple testcase:

    int a1,a2,a3,a4,a5,a6,a7,a8,a9,a10;
    int a11,a12,a13,a14,a15,a16,a17,a18,a19,a20;

    a1=a2=a3=a4=a5=a6=a7=a8=a9=a10=10;
    a11=a12=a13=a14=a15=a16=a17=a18=a19=a20=20;


if(a1==a2==a3==a4==a5==a6==a7==a8==a9==a10==a11==a12==a13==a14==a15==a16==a17==a18==a19==a20)
    {
        printf("equal \n");
    }
    else
    {
        printf("not equal \n");
    }

All the variables are stored in the stack.

I have already tried the option *-debug-only=regalloc, *but I am not able
to understand the mapping and live variable analysis properly.

I want to analyze, how spilling takes place.

Thank you for your time.

Regards,
Priyanka


On Mon, Oct 28, 2019 at 12:48 PM Dangeti Tharun kumar <
cs15mtech11002 at iith.ac.in> wrote:

> Hi
>
> On Fri, Oct 25, 2019 at 11:40 AM Priyanka Panigrahi via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
>
>> Hello,
>>
>> I have studied register allocation in theoretical aspects and exploring
>> the same in the implementation level.
>>
>> I need a minimal testcase for register spilling to analyze spilling
>> procedure in llvm. I tried with a testcase taking 20 variables but all the
>> 20 variables are getting stored in the stack using %rbp. Maybe my live
>> variable analysis is wrong. Please help me with a minimal testcase to
>> explore register spilling in llvm,
>>
>
> You can share your testcase, people can have a look at it
>
>>
>> Is there any way to print the maximum live variables in source code. So
>> that we can find out the minimum registers required for execution. Also, is
>> it possible to print the register map of each variable in source code.
>>
>
> *-debug-only=regalloc *will dump a lot of information including live
> intervals and register maps.
> Something like this.
>
> ********** REWRITE VIRTUAL REGISTERS **********
> ********** Function: main
> ********** REGISTER MAP **********
> [%0 -> $r12] GR64_with_sub_8bit
> [%1 -> $r15] GR64_with_sub_8bit
> [%9 -> $rsi] GR64_with_sub_8bit
> [%10 -> $rdx] GR64_with_sub_8bit
> [%14 -> $xmm1] FR32
> [%17 -> $xmm1] FR32
> [%20 -> $xmm1] FR32
> [%27 -> $r15] GR64
> [%35 -> $rdi] GR64
> [%38 -> $xmm0] FR64
> [%39 -> $xmm0] FR32
> [%44 -> $xmm0] FR32
> [%45 -> $xmm0] FR64
> [%56 -> $rcx] GR64_with_sub_8bit
> [%60 -> $rdi] GR64_with_sub_8bit
> [%66 -> $rax] GR64_with_sub_8bit
> [%73 -> $xmm0] FR32
> [%74 -> $xmm0] FR64
> [%82 -> $rbx] GR64_NOSP
> [%83 -> $rbx] GR64_NOSP
> [%87 -> $rdi] GR64_NOSP
> [%88 -> $xmm0] FR32
> [%90 -> $rbx] GR64_NOSP
> [%91 -> $rbx] GR64_NOSP
> [%93 -> $r14] GR64_with_sub_8bit
>
>
>
>>
>> Any help would be appreciated.
>> Thank you in advance.
>>
>> Regards,
>> Priyanka
>> _______________________________________________
>> LLVM Developers mailing list
>> llvm-dev at lists.llvm.org
>> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
>>
>
>
> --
> Regards,
> DTharun
>
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