[llvm-dev] [GlobalISel] What is the correct way to match truncating stores with TableGen?

[Dominik Montada via llvm-dev]

Hey there,

I am working on a backend that only uses 32-bit registers, but also has 
instructions for storing/loading bytes and half-words. I am using 
GlobalISel for this backend.

As I only have 32-bit registers available, I tell the legalizer to clamp 
the value to be loaded/stored to s32. Now, when I write patterns in 
TableGen to emit code for truncating stores / extending loads I can use 
*extloadi8 and *extloadi16 for matching the extending loads. However, I 
am unable to use truncstorei8 and truncstorei16, as TableGen gives me 
the following error:

warning: Skipped pattern: Src pattern root isn't a trivial operator (Has 
a predicate (unindexedstore unindexed, truncstore truncstore, 
truncstorei8 MemVT=i8), first-failing:truncstorei8)

Is there any way to make GlobalISel work with truncstorei8 and 
truncstorei16?

If not, what are my other possibilities? I already tried to make store 
legal for s8 and s16 and inserting an explicit G_TRUNC, so I can use 
store (i8 (trunc ...)) in my TableGen pattern. This works partially as I 
am only able to match this pattern if I have this explicit G_TRUNC. But 
since I allow G_CONSTANT to be legal for s8 and s16 to get rid of some 
legalization artifacts, I can not match a simple store of an i16 
constant for example.

For this I also (mostly) found a workaround. I created the following 
pattern:

def : Pat<(store i8:$val, ...), (STB GPR:$val, ...)>;

This however causes TableGen to complain about a type contradiction as I 
have defined my GPR register class to only hold i32 (so for TableGen: i8 
!= i32, therefore type contradiction). It works if I add i16 and i8 to 
the value type list for the register class. However looking at other 
backends, I am not sure this would be the correct thing to do. I also 
have no idea what other effects such a change would cause.

What would be the correct way to solve this problem? Add the additional 
value types to my register class? Or will I have to use custom selection 
to make this work?

Thanks,

Dominik

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Dominik Montada                   Email: dominik.montada at hightec-rt.com
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