[llvm-dev] Understanding targets

Gaier, Bjoern via llvm-dev llvm-dev at lists.llvm.org
Wed Nov 13 23:10:52 PST 2019

Hello Paul and Simon, (Sorry - I'm not sure about the social conventions in mailing lists)

Both of your answers helped me a lot! So If I understand it correctly, Clang knows what 'mips1' and 'mips5' are - but can't generate code for it? Why is it like that?

I actually have a more in general questions about processors... If this is the wrong place for it, please ignore it, I'm just a bit confused.
So the R3000 is a "MIPS CPU"? What does that actually mean? Is the architecture MIPS? Or the producer? When I go to Wikipedia I see MIPS as the designer, so I take it is like saying "Intel CPU" or "AMD CPU" but that does not tell me anything about the assembly instruction it uses, right?
But then also I see as Design "RISC", as I understood it describes the assembly instructions? But why would I tell Clang to target "mips1" when the design of the R3000 is RISC? Why isn't RISCV correct then? Or RISC1 or so...

Also how does that influence floating point arithmetic? I often heard that those are separated processors FPUs(?). So could it be, that there is an additional processor besides the processor I know about? Like R3000 + FPU? Wouldn't had Clang or any other compiler to know about such a construct or is that not the case?

Sorry again if this is too much off topic - I simply never thought about such stuff before °/////°

Thank you in advance and kind greetings

-----Original Message-----
From: Simon Atanasyan <simon at atanasyan.com>
Sent: 13 November 2019 16:49
To: Robinson, Paul <paul.robinson at sony.com>
Cc: Gaier, Bjoern <Bjoern.Gaier at horiba.com>; llvm-dev at lists.llvm.org
Subject: Re: Understanding targets

On Wed, Nov 13, 2019 at 6:28 PM Robinson, Paul <paul.robinson at sony.com> wrote:
> Regarding the Mips target, it looks like the supported 32-bit
> architecture names are “mips” and “mipsel” so you could experiment
> with using triples starting with those strings.  I don’t know anything
> in particular about the Mips target other than what I just said.  I
> have cc’d the code owner of the MIPS target, who might be able to help you there.

>> I see there “Mips” and “RISCV” but no RISC MIPS or even a R3000 –
>> does that now mean that Clang does not support does old processors?
>> Or does it? What do I do if I encounter a ‘wild’ Clang without
>> llvm-config – can I still find out its targets? I have no idea and this is why I’m asking.

Now Clang accepts the following MIPS CPU names. This list can be found in the "clang/lib/Basic/Targets/Mips.cpp". mips1 and mips5 accepted by Clang, but unsupported by code generator. I'm going to remove them from this list.

mips1, mips2, mips3, mips4, mips5,
mips32, mips32r2, mips32r3, mips32r5, mips32r6, mips64, mips64r2, mips64r3, mips64r5, mips64r6, octeon, octeon+, p5600

R3000 is a CPU implements mips1 instruction set architecture.
Unfortunately you cannot generate a code for this CPU using Clang.

Simon Atanasyan
Als GmbH eingetragen im Handelsregister Bad Homburg v.d.H. HRB 9816, USt.ID-Nr. DE 114 165 789 Geschäftsführer: Dr. Hiroshi Nakamura, Dr. Robert Plank, Markus Bode, Heiko Lampert, Takashi Nagano, Takeshi Fukushima. Junichi Tajika

More information about the llvm-dev mailing list