[llvm-dev] Understanding targets

Simon Atanasyan via llvm-dev llvm-dev at lists.llvm.org
Wed Nov 13 07:48:47 PST 2019

On Wed, Nov 13, 2019 at 6:28 PM Robinson, Paul <paul.robinson at sony.com> wrote:
> Regarding the Mips target, it looks like the supported 32-bit architecture
> names are “mips” and “mipsel” so you could experiment with using triples
> starting with those strings.  I don’t know anything in particular about
> the Mips target other than what I just said.  I have cc’d the code owner
> of the MIPS target, who might be able to help you there.

>> I see there “Mips” and “RISCV” but no RISC MIPS or even a R3000 – does that
>> now mean that Clang does not support does old processors? Or does it? What
>> do I do if I encounter a ‘wild’ Clang without llvm-config – can I still find
>> out its targets? I have no idea and this is why I’m asking.

Now Clang accepts the following MIPS CPU names. This list can be found
in the "clang/lib/Basic/Targets/Mips.cpp". mips1 and mips5 accepted by
Clang, but unsupported by code generator. I'm going to remove them
from this list.

mips1, mips2, mips3, mips4, mips5,
mips32, mips32r2, mips32r3, mips32r5, mips32r6,
mips64, mips64r2, mips64r3, mips64r5, mips64r6,
octeon, octeon+, p5600

R3000 is a CPU implements mips1 instruction set architecture.
Unfortunately you cannot generate a code for this CPU using Clang.

Simon Atanasyan

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