[llvm-dev] How shall I evaluate the latency of each instruction in LLVM IR?

Cranmer, Joshua via llvm-dev llvm-dev at lists.llvm.org
Mon May 13 07:52:46 PDT 2019

There is no fixed latency/throughput to LLVM IR instructions. Instructions are lowered to target instructions based on the target and the subtarget, and these lowerings can have multiple IR instructions coalesced into a single target instruction or one IR instruction split into several instructions. Latency/throughput is provided for target instructions based on the *Schedule.td files, but there is no easy mapping between these instructions and LLVM IR. Some ad-hoc estimation for the IR level is provided by TargetLowering and especially TargetTransformInfo, but these do not provide complete coverage and only provide coarse estimates.

From: llvm-dev [mailto:llvm-dev-bounces at lists.llvm.org] On Behalf Of Duan Bing via llvm-dev
Sent: Sunday, May 12, 2019 21:59
To: LLVM Developers Mailing List <llvm-dev at lists.llvm.org>
Subject: [llvm-dev] How shall I evaluate the latency of each instruction in LLVM IR?

Inspired by https://www.agner.org/optimize/instruction_tables.pdf,  which gives us the latency and reciprocal throughput of each instruction in the different architecture of X86, Is there anybody taking the effort to do a similar job for LLVM IR?

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20190513/72a750f8/attachment.html>

More information about the llvm-dev mailing list