[llvm-dev] GlobalISel: Ambiguous intrinsic semantics problem

Matt Arsenault via llvm-dev llvm-dev at lists.llvm.org
Mon Mar 11 13:23:47 PDT 2019



> On Mar 11, 2019, at 3:30 PM, Amara Emerson via llvm-dev <llvm-dev at lists.llvm.org> wrote:
> 
> Hi GlobalISel interested parties,
> 
> A recent bug report (https://bugs.llvm.org/show_bug.cgi?id=40968 <https://bugs.llvm.org/show_bug.cgi?id=40968>) on AArch64 exposed a problem with our modeling of intrinsic semantics when dealing with type overloaded calls. The crux of the matter is that because GlobalISel’s LowLevelTypes only carry size and vector layout information, and not any information about whether a type is integer or fp, we lose information during IR translation of type overloaded intrinsics.

I’m pretty strongly opposed to #2. I think the more relaxed type system is one of the advantages over SelectionDAG, and want to avoid the mess of bitcasts we have to insert now to satisfy the artificial type constraints. The original intrinsic seems misspecified to me, and should be spilt into separate FP/int versions.

-Matt
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