[llvm-dev] [RFC] Tensilica Xtensa (ESP32) backend
Dan Kortschak via llvm-dev
llvm-dev at lists.llvm.org
Wed Mar 6 13:42:27 PST 2019
This is welcome news to me.
We use ESP8266 (yes, not ESP32, but your future plans include the older
MCU) for an IOT system in conjunction with RPi machines. The language
that we target in preference is Go, but obviously currently use C++ for
the ESPs. We'd like to use Go for the ESPs via the tinygo.org project,
but this depends on clang/llvm support of the MCU target.
I recently asked here about the prior work https://lists.llvm.org/piper
On Wed, 2019-03-06 at 14:29 +0300, Andrei Safronov via llvm-dev wrote:
> I'm from Espressif Systems company, software department. Our company
> develops processors based on Xtensa architecture like ESP32 and
> We propose the integration of a backend targeting Xtensa
> We started to develop LLVM Xtensa backend almost a year ago. The
> was that we saw a demand from our large developers community.
> only GNU compiler supports Xtensa architecture. The company has
> me to develop and maintain Xtensa backend.
> We already have the initial version of the Xtensa backend, based on
> Compiler Infrastructure, release 6.0.0. It was successfully tested
> GCC torture testsuite and multiple applications.
> These are the links to LLVM and Clang repositories.
> Current version can generate Xtensa assembly code as output, not
> files yet, and has to be used together with GNU Binutils and GCC-
> libraries to create object and binary files.
> Xtensa backend features implemented:
> - Xtensa target description(Xtnesa.td, XtensaTargetMachine.cpp,
> - ISA desciption (XtensaInstrInfo.td, XtensaInstrFormats.td,
> - Xtensa Call ABI (XtensaCallingConv.td, XtensaFrameLowering.cpp)
> - ASM printer/parser(XtesaAsmPrinter.cpp, XtensaInstrPrinter.cpp,
> Xtensa architecture features implemented in compiler:
> - Xtensa Core Architecture instructions
> - Code Density option
> - Windowed Register option
> - Floating-Point Coprocessor option
> - Boolean option (only a subset of instructions)
> - Thread Pointer option
> - atomic operations
> Current Xtensa target list:
> - support Xtensa LX6 target (ESP32) by default
> Compiler optimization levels include O0/O1/O2/O3/Os options.
> With LLVM community approval, my next plans will be
> - rebasing on the upstream version of LLVM.
> - object code generation (XtensaMC package)
> - implement test cases
> - support for LX106 target (ESP8266)
> - improvements of generated code performance
> - support for zero-overhead loop option
> - MAC16 option
> There were some discussions about implementation of the Xtensa
> and attempt to implement it:
> Also there were attempts to implement a LLVM Xtensa backend, but
> recently I found only one actual link:
> All comments and suggesions are welcome!
> Andrei Safronov
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
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